soc/mediatek/mt8186: Add devapc basic drivers

Add basic devapc (device access permission control) drivers.

DAPC driver is used to set up bus fabric security and data protection
among hardwares. DAPC driver groups the master hardwares into different
domains and gives secure and non-secure property. The slave hardware can
configure different access permissions for different domains via DAPC
driver.

1. Initialize devapc.
2. Set master domain and secure side band.
3. Set default permission.

BUG=b:202871018
TEST=build pass

Signed-off-by: Runyang Chen <runyang.chen@mediatek.corp-partner.google.com>
Change-Id: I5dad4f342eef3136c24c38259ad176dc86b7c0d7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60317
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

1 files changed, 93 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8186/include/soc/devapc.h b/src/soc/mediatek/mt8186/include/soc/devapc.h
new file mode 100644
index 0000000000..48d5f3ee27
--- /dev/null
+++ b/src/soc/mediatek/mt8186/include/soc/devapc.h
@@ -0,0 +1,93 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* This file is created based on MT8169_DEVICE_APC_REG_DEVAPC_external.docx */
+
+#ifndef SOC_MEDIATEK_MT8186_DEVAPC_H
+#define SOC_MEDIATEK_MT8186_DEVAPC_H
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+
+void dapc_init(void);
+
+enum devapc_ao_offset {
+	SYS0_D0_APC_0 = 0x0,
+	DOM_REMAP_0_0 = 0xD00,
+	DOM_REMAP_1_0 = 0xD04,
+	MAS_DOM_0 = 0x0A00,
+	MAS_SEC_0 = 0x0B00,
+	AO_APC_CON = 0x0F00,
+};
+
+/******************************************************************************
+ * STRUCTURE DEFINITION
+ ******************************************************************************/
+/* Common */
+enum trans_type {
+	NON_SECURE_TRANS = 0,
+	SECURE_TRANS,
+};
+
+enum devapc_perm_type {
+	NO_PROTECTION = 0,
+	SEC_RW_ONLY,
+	SEC_RW_NS_R,
+	FORBIDDEN,
+	PERM_NUM,
+};
+
+enum domain_id {
+	DOMAIN_0 = 0,
+	DOMAIN_1,
+	DOMAIN_2,
+	DOMAIN_3,
+	DOMAIN_4,
+	DOMAIN_5,
+	DOMAIN_6,
+	DOMAIN_7,
+	DOMAIN_8,
+	DOMAIN_9,
+	DOMAIN_10,
+	DOMAIN_11,
+	DOMAIN_12,
+	DOMAIN_13,
+	DOMAIN_14,
+	DOMAIN_15,
+};
+
+struct apc_infra_peri_dom_16 {
+	unsigned char d_permission[16];
+};
+
+struct apc_infra_peri_dom_8 {
+	unsigned char d_permission[8];
+};
+
+struct apc_infra_peri_dom_4 {
+	unsigned char d_permission[4];
+};
+
+enum devapc_sys_dom_num {
+	DOM_NUM_INFRA_AO_SYS0 = 8,
+	DOM_NUM_MM_AO_SYS0 = 4,
+};
+
+enum devapc_cfg_index {
+	DEVAPC_DEBUGSYS_INDEX = 17,
+};
+
+/* PERM_ATTR MACRO */
+#define DAPC_INFRA_AO_SYS0_ATTR(...)	{ { DAPC_PERM_ATTR_8(__VA_ARGS__) } }
+#define DAPC_MM_AO_SYS0_ATTR(...)	{ { DAPC_PERM_ATTR_4(__VA_ARGS__) } }
+
+/******************************************************************************
+ * Variable DEFINITION
+ ******************************************************************************/
+#define MOD_NO_IN_1_DEVAPC		16
+
+/******************************************************************************
+ * Bit Field DEFINITION
+ ******************************************************************************/
+DEFINE_BIT(SCP_SSPM_SEC, 21)
+
+#endif