diff options
author | Michael Niewöhner <foss@mniewoehner.de> | 2021-10-05 21:42:57 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-13 13:51:24 +0000 |
commit | f72c7b154dfbbe7bc456d30ee80a875e2cb1c656 (patch) | |
tree | ee016336e07cd2a1a2665cf861af6853449e401e /src/soc/mediatek/mt8183 | |
parent | 9cae17d028d4bd3b278fc89ada8e06287917e213 (diff) |
soc/amd/cezanne,soc/intel/common: rework CPPC table generation
Make use of the newly introduced ACPI macros for CPPC table generation
that currently exists of a bunch of confusing assignments of structs
that only get partially filled.
Test: dumped SSDT before and after do not differ.
Change-Id: I844d191b1134b98e409240ede71e2751e51e2159
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57888
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Lance Zhao
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/mediatek/mt8183')
0 files changed, 0 insertions, 0 deletions