diff options
author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-06-08 18:21:45 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-11 10:46:09 +0000 |
commit | 0eb92dfbc7ceeec6af0e5f0e2ace6c389541838f (patch) | |
tree | 84d87d049f1ad14243e318aeb5109f37ae00fba2 /src/soc/mediatek/mt8183/mmu_operations.c | |
parent | c645a5aac4c2af002c7748524fbe1f51a64e2300 (diff) |
mediatek/mt8183: Add MMU operation support
Enable MMU in bootblock for performance, link common code to provide
mtk_mmu_after_dram() to update MMU table in romstage after dram ready,
implement mtk_soc_disable_l2c_sram(), and call
mtk_mmu_disable_l2c_sram() to turn off L2C sram in ramstage.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui.
Change-Id: I4e35f8276ca23de7fd13da3515b9f48d944ead32
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/27303
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/mmu_operations.c')
-rw-r--r-- | src/soc/mediatek/mt8183/mmu_operations.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/mmu_operations.c b/src/soc/mediatek/mt8183/mmu_operations.c new file mode 100644 index 0000000000..d932e056f9 --- /dev/null +++ b/src/soc/mediatek/mt8183/mmu_operations.c @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <soc/mcucfg.h> +#include <soc/mmu_operations.h> + +void mtk_soc_disable_l2c_sram(void) +{ + /* Turn off L2C SRAM and return it to L2 cache. */ + write32(&mt8183_mcucfg->l2c_cfg_mp0, 7 << 8); +} |