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| author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | 2022-02-24 23:03:40 -0700 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2022-03-08 23:46:50 +0000 |
| commit | f53214677caca8077d83fbde3d351a2899cdae16 (patch) | |
| tree | ad337b084e6d270619e620f7ab7d2df442976a22 /src/soc/mediatek/mt8183/i2c.c | |
| parent | 83c27fd50a6aa922efda1a5972c44f8a7e878fb7 (diff) | |
util/spd_tools: Encode SDRAM min cycle time (TCKMinPs)
ADL encodes CK cycle time as tCKMin whereas Sabrina encodes WCK cycle
time. Encode tCKMin as per the respective advisories.
BUG=None
TEST=Generate the SPD and ensure that tCKMin is encoded accordingly.
Minimum CAS Latency time is also impacted and is encoded accordingly.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I99ada7ead3a75befb0f934af871eecc060adcb26
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62387
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/i2c.c')
0 files changed, 0 insertions, 0 deletions