diff options
| author | Huayang Duan <huayang.duan@mediatek.com> | 2019-12-30 13:19:05 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-06 08:00:48 +0000 |
| commit | 25930f4a3f7c518afadeb1d0298f9750707748e8 (patch) | |
| tree | c14be78017e72b65f56b1348668caeca1a18b982 /src/soc/mediatek/mt8183/dramc_pi_basic_api.c | |
| parent | 998737df71c3c2ed97da36305ef065eb280cf2b2 (diff) | |
soc/mediatek/mt8183: Do TX tracking for DRAM DVFS feature
The TX window will offset to edge during DVFS switch, which may cause
TX data transmission error and random kernel crash. Therefore, use the
standard dqsosc (DQS Oscillator) for TX window tracking.
BUG=b:142358843
BRANCH=kukui
TEST=Boots correctly on Kukui
Change-Id: Idcf9213a488e795df3faf64b03588cfe55cb2f81
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37996
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/dramc_pi_basic_api.c')
| -rw-r--r-- | src/soc/mediatek/mt8183/dramc_pi_basic_api.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/dramc_pi_basic_api.c b/src/soc/mediatek/mt8183/dramc_pi_basic_api.c index 1eb86f406f..c7d6c748e7 100644 --- a/src/soc/mediatek/mt8183/dramc_pi_basic_api.c +++ b/src/soc/mediatek/mt8183/dramc_pi_basic_api.c @@ -427,6 +427,9 @@ void dramc_runtime_config(void) transfer_pll_to_spm_control(); setbits32(&mtk_spm->spm_power_on_val0, 0x1 << 25); + for (u8 chn = 0; chn < CHANNEL_MAX; chn++) + dramc_hw_dqsosc(chn); + /* RX_TRACKING: ON */ for (u8 chn = 0; chn < CHANNEL_MAX; chn++) dramc_rx_input_delay_tracking(chn); @@ -498,6 +501,7 @@ void dramc_runtime_config(void) (0x3 << 4) | (0x1 << 2) | (0x1 << 0)); setbits32(&ch[chn].ao.dummy_rd, 0x3 << 26); } + dramc_dqs_precalculation_preset(); enable_emi_dcm(); dramc_enable_dramc_dcm(); |