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authorJeremy Compostella <jeremy.compostella@intel.com>2024-11-01 14:15:42 -0700
committerJérémy Compostella <jeremy.compostella@intel.com>2024-11-27 21:28:41 +0000
commit83fb3b70f0d16ff5d2f755ab875cc4d55992c1fa (patch)
tree725b937d889d16b81e810b05e8231cab9c684dca /src/soc/mediatek/mt8183/ddp.c
parent1e8c6819b16ef5e21b2f3f0137a6027367387298 (diff)
drivers/wifi: Support Drive Strength BRI Rsp Table
Drive Strength BRI Rsp Object provides information from the OEM platforms if they have replaced the Bluetooth Radio Interface resistor to overcome the potential STEP errors on their designs. Based on configuration, CNV firmware shall adjust the BRI Rsp line drive strength. The bri_resistor_value is encoded as follow: | Bit | Val | Description | Default | |------+-----+---------------------------------------------+---------| | 0 | 0 | Device FW default values | 1 | | | 1 | Override device FW default values | | | 3:1 | 0 | Reserved (shall be set to 0) | 0 | | 7:4 | 0 | DSBR override values (only if bit 0 is set) | 0xf | | 31:7 | 0 | Reserved (shall be set to 0) | 0 | Possible values: - 0xf1 (default): indicates that the resistor on board is 33 Ohm - 0x0 or 0xb1: indicates that the resistor on board is 10 Ohm The implementation follows document 559910 Intel Connectivity Platforms BIOS Guideline revision 9.2 specification. BUG=b:346600091 TEST=DSBR methods are added to the wifi device and bluetooth companion device and they return the data supplied by the SAR binary blob Change-Id: Iebe95815c944d045f4cf686abcd1874a8a45e300 Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85017 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/ddp.c')
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