diff options
author | jg_poxu <jg_poxu@mediatek.com> | 2019-05-15 11:36:45 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-06-21 08:37:06 +0000 |
commit | a2c6a0998599812de3e0413a0d86acf7fcbe7865 (patch) | |
tree | 5de504f01bd7268683e9ad8a6a23975acfeec9cf /src/soc/mediatek/mt8183/auxadc.c | |
parent | 8d83c662c335c5c2961aabcf49d55ad47e9237ae (diff) |
mediatek/mt8183: Add efuse calibration in auxadc
The values from auxadc may be incorrect if not calibrated by efuse.
Without calibration, the value error range is about +/-50mv,
and after being calibrated the error range is about +/-10mv.
BUG=b:131391176
TEST=make clean && make test-abuild; boots on Kukui rev 2 units.
BRANCH=none
Change-Id: Iccd6ea0ad810c993f9b62c0974279c960f890e52
Signed-off-by: Po Xu <jg_poxu@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32800
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: JG Poxu <jg_poxu@mediatek.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/auxadc.c')
-rw-r--r-- | src/soc/mediatek/mt8183/auxadc.c | 37 |
1 files changed, 36 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8183/auxadc.c b/src/soc/mediatek/mt8183/auxadc.c index a167d2b58e..5460486709 100644 --- a/src/soc/mediatek/mt8183/auxadc.c +++ b/src/soc/mediatek/mt8183/auxadc.c @@ -18,11 +18,37 @@ #include <delay.h> #include <soc/addressmap.h> #include <soc/auxadc.h> +#include <soc/efuse.h> #include <soc/infracfg.h> #include <timer.h> static struct mtk_auxadc_regs *const mtk_auxadc = (void *)AUXADC_BASE; +#define ADC_GE_A_SHIFT 10 +#define ADC_GE_A_MASK (0x3ff << ADC_GE_A_SHIFT) +#define ADC_OE_A_SHIFT 0 +#define ADC_OE_A_MASK (0x3ff << ADC_OE_A_SHIFT) +#define ADC_CALI_EN_A_SHIFT 20 +#define ADC_CALI_EN_A_MASK (0x1 << ADC_CALI_EN_A_SHIFT) + +static int cali_oe; +static int cali_ge; +static int calibrated = 0; +static void mt_auxadc_update_cali(void) +{ + uint32_t cali_reg; + int cali_ge_a; + int cali_oe_a; + + cali_reg = read32(&mtk_efuse->adc_cali_reg); + + if ((cali_reg & ADC_CALI_EN_A_MASK) != 0) { + cali_oe_a = (cali_reg & ADC_OE_A_MASK) >> ADC_OE_A_SHIFT; + cali_ge_a = (cali_reg & ADC_GE_A_MASK) >> ADC_GE_A_SHIFT; + cali_ge = cali_ge_a - 512; + cali_oe = cali_oe_a - 512; + } +} static uint32_t auxadc_get_rawdata(int channel) { setbits_le32(&mt8183_infracfg->module_sw_cg_1_clr, 1 << 10); @@ -44,8 +70,17 @@ static uint32_t auxadc_get_rawdata(int channel) int auxadc_get_voltage(unsigned int channel) { + uint32_t raw_value; assert(channel < 16); + if (!calibrated) { + mt_auxadc_update_cali(); + calibrated = 1; + } + /* 1.5V in 4096 steps */ - return (int)((int64_t)auxadc_get_rawdata(channel) * 1500000 / 4096); + raw_value = auxadc_get_rawdata(channel); + + raw_value = raw_value - cali_oe; + return (int)((int64_t)raw_value * 1500000 / (4096 + cali_ge)); } |