diff options
author | Furquan Shaikh <furquan@chromium.org> | 2017-05-17 17:26:01 -0700 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2017-05-19 21:23:39 +0200 |
commit | e2fc5e25f2d1cab86edac352d1a91f55c15c9f0a (patch) | |
tree | 71a86a3dd19e445a04d9088eedd1f14373da75bb /src/soc/mediatek/mt8173 | |
parent | a1491574ef2c91ff8b89df70feba67ad34836c75 (diff) |
drivers/spi/spi_flash: Move flash ops to spi_flash_ops structure
Define a new spi_flash_ops structure, move all spi flash operations to
this structure and add a pointer to this structure in struct spi_flash.
BUG=b:38330715
Change-Id: I550cc4556fc4b63ebc174a7e2fde42251fe56052
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19757
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8173')
-rw-r--r-- | src/soc/mediatek/mt8173/flash_controller.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/src/soc/mediatek/mt8173/flash_controller.c b/src/soc/mediatek/mt8173/flash_controller.c index f4c0de47d8..f77688563a 100644 --- a/src/soc/mediatek/mt8173/flash_controller.c +++ b/src/soc/mediatek/mt8173/flash_controller.c @@ -228,18 +228,24 @@ static int nor_erase(const struct spi_flash *flash, u32 offset, size_t len) return 0; } -int mtk_spi_flash_probe(const struct spi_slave *spi, struct spi_flash *flash) +const struct spi_flash_ops spi_flash_ops = { + .read = nor_read, + .write = nor_write, + .erase = nor_erase, +}; + +int mtk_spi_flash_probe(const struct spi_slave *spi, + struct spi_flash *flash) { write32(&mt8173_nor->wrprot, SFLASH_COMMAND_ENABLE); memcpy(&flash->spi, spi, sizeof(*spi)); + flash->name = "mt8173 flash controller"; - flash->internal_write = nor_write; - flash->internal_erase = nor_erase; - flash->internal_read = nor_read; - flash->internal_status = 0; flash->sector_size = 0x1000; flash->erase_cmd = SECTOR_ERASE_CMD; flash->size = CONFIG_ROM_SIZE; + flash->ops = &spi_flash_ops; + return 0; } |