summaryrefslogtreecommitdiff
path: root/src/soc/mediatek/mt8173
diff options
context:
space:
mode:
authorBalaji Manigandan B <balaji.manigandan@intel.com>2017-09-22 14:27:56 +0530
committerMartin Roth <martinroth@google.com>2017-10-05 17:45:46 +0000
commitbd55c02a2398e2ce95cb06ff9f1e3fb1c20d0ab8 (patch)
tree17496aca51e0b349ac9816ba9fb27102219cc1ea /src/soc/mediatek/mt8173
parent53b8a82e72b74e7598c5344597e014cd5c6fb49e (diff)
vendor/intel/skykabylake: Update FSP header files to version 2.7.2
Update FSP header files to version 2.7.2. New UPDs added FspmUpd.h: *CleanMemory FspsUpd.h: *IslVrCmd *ThreeStrikeCounterDisable Structure member names used to specify memory configuration to MRC have been updated, SoC side romstage code is updated to handle this change. CQ-DEPEND=CL:*460573,CL:*460612,CL:*460592 BUG=b:65499724 BRANCH=None TEST= Build and boot soraka, basic sanity check and suspend resume checks. Change-Id: Ia4eca011bc9a3b1a50e49d6d86a09d05a0cbf151 Signed-off-by: Balaji Manigandan B <balaji.manigandan@intel.com> Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/21679 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8173')
0 files changed, 0 insertions, 0 deletions