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author | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-09 21:53:58 +0200 |
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committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-17 21:53:38 +0000 |
commit | 5d1a328e88674e64878954674f45f0a09120fc98 (patch) | |
tree | c918065cb03a7f051bb9875f67781045ac43b5c6 /src/soc/mediatek/mt8173 | |
parent | b349f258a99d4e56e875b7dbf86fa2368d196a41 (diff) |
soc/intel/cannonlake: add missing special function pads
The following parameters do nothing else than configuring the
corresponding pads to native mode:
- DdiPortEdp
- DdiPort*Hpd
- DdiPort*Ddc
- GpioDdp*
- SpiGpioAssign
- I2c*GpioAssign
- SerialIoUartDebugEnable
- Gp*GpioAssign
- Uart*GpioAssign
- GpioEnableHdaLink
- AudioLinkDmic*
- AudioLinkSsp*
- GpioEnableHdaSspMasterClock
- AudioLinkSndw*
- SmbAlertEnable
Add the missing special function gpio pad groups for CNL, to be able to
configure them via gpio.h instead having to set various FSP parameters.
The groups and names are documented in the PCH EDS, in Linux
(linux/drivers/pinctrl/intel/pinctrl-cannonlake.c) and other places.
Also, see soc/intel/tigerlake for reference.
Change-Id: Ia3bc1df1a14dbca7c7213577cb2d5b98bb0acf64
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45211
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/mediatek/mt8173')
0 files changed, 0 insertions, 0 deletions