diff options
| author | Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> | 2021-04-27 21:20:06 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-05-05 07:36:48 +0000 |
| commit | 47095d5ec35b4cbff9d4660cfe9521ed17a0d1ed (patch) | |
| tree | fe8a77a9c18fbadb256a274797c11cf554f7db18 /src/soc/mediatek/mt8173/spi.c | |
| parent | 0575778667e9802a3af9766f459f43f833330d88 (diff) | |
soc/mediatek: Move the common part of SPI drivers to common/
The SPI drivers can be shared by MT8183, MT8192 and MT8195.
TEST=emerge-{oak, kukui, asurada, cherry} coreboot;
verified on Cherry P0
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I7bb7809a88fbda67eca67ecfde45b9cb5f09dffe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52854
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8173/spi.c')
| -rw-r--r-- | src/soc/mediatek/mt8173/spi.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/src/soc/mediatek/mt8173/spi.c b/src/soc/mediatek/mt8173/spi.c index 4abd650bd9..d3c8ad4cbb 100644 --- a/src/soc/mediatek/mt8173/spi.c +++ b/src/soc/mediatek/mt8173/spi.c @@ -26,20 +26,6 @@ void mtk_spi_set_gpio_pinmux(unsigned int bus, gpio_set_mode(GPIO(MSDC2_CMD), 0); } -void mtk_spi_set_timing(struct mtk_spi_regs *regs, u32 sck_ticks, u32 cs_ticks, - unsigned int tick_dly) -{ - write32(®s->spi_cfg0_reg, - ((sck_ticks - 1) << SPI_CFG0_SCK_HIGH_SHIFT) | - ((sck_ticks - 1) << SPI_CFG0_SCK_LOW_SHIFT) | - ((cs_ticks - 1) << SPI_CFG0_CS_HOLD_SHIFT) | - ((cs_ticks - 1) << SPI_CFG0_CS_SETUP_SHIFT)); - clrsetbits32(®s->spi_cfg1_reg, SPI_CFG1_CS_IDLE_MASK | - SPI_CFG1_TICK_DLY_MASK, - (tick_dly << SPI_CFG1_TICK_DLY_SHIFT) | - ((cs_ticks - 1) << SPI_CFG1_CS_IDLE_SHIFT)); -} - static const struct spi_ctrlr spi_flash_ctrlr = { .max_xfer_size = 65535, .flash_probe = mtk_spi_flash_probe, |