aboutsummaryrefslogtreecommitdiff
path: root/src/soc/mediatek/mt8173/include
diff options
context:
space:
mode:
authorTristan Shieh <tristan.shieh@mediatek.com>2018-06-12 14:23:01 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-06-21 09:39:48 +0000
commit53dabc29f2eb44761f4bc28e7f5e211bfeffb234 (patch)
tree76f8ee57661c358464728429a721492a371498d1 /src/soc/mediatek/mt8173/include
parente96a6d26a6dcef86a41233163a4934e52da10235 (diff)
mediatek: Move watchdog timer code to a common directory
Move watchdog timer (WDT) code which can be reused into a common directory under soc/mediatek. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Elm Change-Id: Icbeb04f775c3c0fdc18dd198df8591f5c4b6ddce Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27025 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8173/include')
-rw-r--r--src/soc/mediatek/mt8173/include/soc/wdt.h53
1 files changed, 0 insertions, 53 deletions
diff --git a/src/soc/mediatek/mt8173/include/soc/wdt.h b/src/soc/mediatek/mt8173/include/soc/wdt.h
deleted file mode 100644
index ddca10290f..0000000000
--- a/src/soc/mediatek/mt8173/include/soc/wdt.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 MediaTek Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SOC_MEDIATEK_COMMON_WDT_H
-#define SOC_MEDIATEK_COMMON_WDT_H
-
-#include <stdint.h>
-
-struct mtk_wdt_regs {
- u32 wdt_mode;
- u32 wdt_length;
- u32 wdt_restart;
- u32 wdt_status;
- u32 wdt_interval;
- u32 wdt_swrst;
- u32 wdt_swsysrst;
- u32 reserved[9];
- u32 wdt_debug_ctrl;
-};
-
-/* WDT_MODE */
-enum {
- MTK_WDT_MODE_KEY = 0x22000000,
- MTK_WDT_MODE_DUAL_MODE = 1 << 6,
- MTK_WDT_MODE_IRQ = 1 << 3,
- MTK_WDT_MODE_EXTEN = 1 << 2,
- MTK_WDT_MODE_EXT_POL = 1 << 1,
- MTK_WDT_MODE_ENABLE = 1 << 0
-};
-
-/* WDT_RESET */
-enum {
- MTK_WDT_SWRST_KEY = 0x1209,
- MTK_WDT_STA_SPM_RST = 1 << 1,
- MTK_WDT_STA_SW_RST = 1 << 30,
- MTK_WDT_STA_HW_RST = 1 << 31
-};
-
-int mtk_wdt_init(void);
-
-#endif /* SOC_MEDIATEK_COMMON_WDT_H */