mediatek: Refactor to sharing code among similar SOCs

This patch refactor cbmem and timer code which will be reused among
similar SOCs.

BUG=b:80501386
BRANCH=none
TEST=the refactored code works fine on the new platform (with the rest
     of the patches applied) and Elm platform

Change-Id: I397ebdc0c97c7616bd547022d2ce2a8f08f3c232
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/26881
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 21 insertions, 42 deletions

diff --git a/src/soc/mediatek/mt8173/include/soc/timer.h b/src/soc/mediatek/mt8173/include/soc/timer.h
index 39aacb42c2..e876971d06 100644
--- a/src/soc/mediatek/mt8173/include/soc/timer.h
+++ b/src/soc/mediatek/mt8173/include/soc/timer.h
@@ -13,59 +13,38 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __SOC_MEDIATEK_MT8173_TIMER_H__
-#define __SOC_MEDIATEK_MT8173_TIMER_H__
+#ifndef SOC_MEDIATEK_COMMON_TIMER_H
+#define SOC_MEDIATEK_COMMON_TIMER_H
 
 #include <soc/addressmap.h>
 #include <types.h>
 
-struct mt8173_gpt_regs {
-	u32 irqen;
-	u32 irqsta;
-	u32 irqack;
-	u32 reserved0;
-	u32 gpt1_con;
-	u32 gpt1_clk;
-	u32 gpt1_cnt;
-	u32 gpt1_compare;
-	u32 gpt2_con;
-	u32 gpt2_clk;
-	u32 gpt2_cnt;
-	u32 gpt2_compare;
-	u32 gpt3_con;
-	u32 gpt3_clk;
-	u32 gpt3_cnt;
-	u32 gpt3_compare;
+#define GPT4_MHZ	13
+
+struct mtk_gpt_regs {
+	u32 reserved[16];
 	u32 gpt4_con;
 	u32 gpt4_clk;
 	u32 gpt4_cnt;
-	u32 gpt4_compare;
-	u32 gpt5_con;
-	u32 gpt5_clk;
-	u32 gpt5_cnt;
-	u32 gpt5_compare;
-	u32 gpt6_con;
-	u32 gpt6_clk;
-	u32 gpt6_cntl;
-	u32 gpt6_comparel;
-	u32 reserved1[2];
-	u32 gpt6_cnth;
-	u32 gpt6_compareh;
-	u32 apxgpt_irqmask;
-	u32 apxgpt_irqmask1;
 };
 
-static struct mt8173_gpt_regs *const mt8173_gpt = (void *)GPT_BASE;
+check_member(mtk_gpt_regs, gpt4_con, 0x0040);
+check_member(mtk_gpt_regs, gpt4_clk, 0x0044);
+check_member(mtk_gpt_regs, gpt4_cnt, 0x0048);
 
 enum {
-	GPT_CON_EN = 0x01,
-	GPT_CON_CLR = 0x02,
-	GPT_MODE_ONE_SHOT = 0x00,
-	GPT_MODE_REPEAT   = 0x10,
-	GPT_MODE_KEEP_GO  = 0x20,
+	GPT_CON_EN        = 0x01,
+	GPT_CON_CLR       = 0x02,
 	GPT_MODE_FREERUN  = 0x30,
-	GPT_SYS_CLK = 0x00,
-	GPT_SYS_RTC = 0x01,
+	GPT_SYS_CLK       = 0x00,
+	GPT_CLK_DIV1      = 0x00,
 };
 
-#endif	/* __SOC_MEDIATEK_MT8173_TIMER_H__ */
+/*
+ * This is defined as weak no-ops that can be overridden by legacy SOCs. Some
+ * legacy SOCs need specific settings before init timer. And we expect future
+ * SOCs will not need it.
+ */
+void timer_prepare(void);
+
+#endif