mediatek: Refactor I2C code among similar SOCs

Refactor I2C code which will be reused among similar SOCs.

BUG=b:80501386
BRANCH=none
TEST=emerge-elm coreboot

Change-Id: I407d5e2a9eb29562b40bb300e39f206a94afe76c
Signed-off-by: qii wang <qii.wang@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30975
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>

1 files changed, 3 insertions, 80 deletions

diff --git a/src/soc/mediatek/mt8173/include/soc/i2c.h b/src/soc/mediatek/mt8173/include/soc/i2c.h
index 5f46e9cad5..619893489a 100644
--- a/src/soc/mediatek/mt8173/include/soc/i2c.h
+++ b/src/soc/mediatek/mt8173/include/soc/i2c.h
@@ -16,47 +16,10 @@
 #ifndef SOC_MEDIATEK_MT8173_I2C_H
 #define SOC_MEDIATEK_MT8173_I2C_H
 
-#include <stddef.h>
-
-/* I2C Configuration */
-enum {
-	I2C_HS_DEFAULT_VALUE	 = 0x0102,
-};
-
-enum i2c_modes {
-	I2C_WRITE_MODE		= 0,
-	I2C_READ_MODE		= 1,
-	I2C_WRITE_READ_MODE	= 2,
-};
-
-enum {
-	I2C_DMA_CON_TX          = 0x0,
-	I2C_DMA_CON_RX          = 0x1,
-	I2C_DMA_START_EN        = 0x1,
-	I2C_DMA_INT_FLAG_NONE   = 0x0,
-	I2C_DMA_CLR_FLAG        = 0x0,
-	I2C_DMA_FLUSH_FLAG      = 0x1,
-};
-
-/* I2C DMA Registers */
-struct mt8173_i2c_dma_regs {
-	uint32_t dma_int_flag;
-	uint32_t dma_int_en;
-	uint32_t dma_en;
-	uint32_t dma_rst;
-	uint32_t reserved1;
-	uint32_t dma_flush;
-	uint32_t dma_con;
-	uint32_t dma_tx_mem_addr;
-	uint32_t dma_rx_mem_addr;
-	uint32_t dma_tx_len;
-	uint32_t dma_rx_len;
-};
-
-check_member(mt8173_i2c_dma_regs, dma_tx_len, 0x24);
+#include <soc/i2c_common.h>
 
 /* I2C Register */
-struct mt8173_i2c_regs {
+struct mt_i2c_regs {
 	uint32_t data_port;
 	uint32_t slave_addr;
 	uint32_t intr_mask;
@@ -85,47 +48,7 @@ struct mt8173_i2c_regs {
 	uint32_t transfer_aux_len;
 };
 
-check_member(mt8173_i2c_regs, debug_stat, 0x64);
-
-struct mtk_i2c {
-	struct mt8173_i2c_regs *i2c_regs;
-	struct mt8173_i2c_dma_regs *i2c_dma_regs;
-};
-
-enum {
-	I2C_TRANS_LEN_MASK = (0xff),
-	I2C_TRANS_AUX_LEN_MASK = (0x1f << 8),
-	I2C_CONTROL_MASK = (0x3f << 1)
-};
-
-/* Register mask */
-enum {
-	I2C_HS_NACKERR = (1 << 2),
-	I2C_ACKERR = (1 << 1),
-	I2C_TRANSAC_COMP = (1 << 0),
-};
-
-/* i2c control bits */
-enum {
-	ACK_ERR_DET_EN = (1 << 5),
-	DIR_CHG = (1 << 4),
-	CLK_EXT = (1 << 3),
-	DMA_EN = (1 << 2),
-	REPEATED_START_FLAG = (1 << 1),
-	STOP_FLAG = (0 << 1)
-};
-
-/* I2C Status Code */
-
-enum {
-	I2C_OK = 0x0000,
-	I2C_SET_SPEED_FAIL_OVER_SPEED = 0xA001,
-	I2C_TRANSFER_INVALID_LENGTH = 0xA002,
-	I2C_TRANSFER_FAIL_HS_NACKERR = 0xA003,
-	I2C_TRANSFER_FAIL_ACKERR = 0xA004,
-	I2C_TRANSFER_FAIL_TIMEOUT = 0xA005,
-	I2C_TRANSFER_INVALID_ARGUMENT = 0xA006
-};
+check_member(mt_i2c_regs, debug_stat, 0x64);
 
 void mtk_i2c_bus_init(uint8_t bus);