diff options
author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-07-02 17:20:13 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-11 10:46:45 +0000 |
commit | 17180af69a95ad5823c501737d0ba2a0e849b4df (patch) | |
tree | 499dd89265e36bf27548d0dae071c79db48c40c4 /src/soc/mediatek/mt8173/dramc_pi_basic_api.c | |
parent | bb684e0c8d636b0f9753ddf6237880543a365f48 (diff) |
mediatek: Share PLL code among similar SOCs
Refactor PLL code which will be reused among similar SOCs.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Elm
Change-Id: I11f044fbef93d4f5f4388368c510958d2b0ae66c
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/27305
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8173/dramc_pi_basic_api.c')
-rw-r--r-- | src/soc/mediatek/mt8173/dramc_pi_basic_api.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8173/dramc_pi_basic_api.c b/src/soc/mediatek/mt8173/dramc_pi_basic_api.c index cb6cc2c2e3..4babd542f6 100644 --- a/src/soc/mediatek/mt8173/dramc_pi_basic_api.c +++ b/src/soc/mediatek/mt8173/dramc_pi_basic_api.c @@ -738,7 +738,7 @@ void transfer_to_spm_control(void) u32 msk; msk = BIT(7) | BIT(11) | BIT(15); - clrbits_le32(&mt8173_apmixed->ap_pll_con3, msk); + clrbits_le32(&mtk_apmixed->ap_pll_con3, msk); msk = BIT(0) | BIT(4) | BIT(8); clrbits_le32(&ch[CHANNEL_A].ddrphy_regs->peri[3], msk); @@ -756,7 +756,7 @@ void transfer_to_reg_control(void) u32 val; val = BIT(7) | BIT(11) | BIT(15); - setbits_le32(&mt8173_apmixed->ap_pll_con3, val); + setbits_le32(&mtk_apmixed->ap_pll_con3, val); val = BIT(0) | BIT(4) | BIT(8); setbits_le32(&ch[CHANNEL_A].ddrphy_regs->peri[3], val); |