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| author | Subrata Banik <subrata.banik@intel.com> | 2017-05-12 11:29:43 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-05-16 17:44:24 +0200 |
| commit | 481b364222322b96dc16ebc126040ed9c0aa2811 (patch) | |
| tree | 4ce28da4942f89923b38f4c428b7ea4e923d8657 /src/soc/mediatek/mt8173/da9212.c | |
| parent | 7bde848d625d078f15a77bf7ed53613789c0daf8 (diff) | |
soc/intel/skylake: Configure C-state interrupt response time
Program C3/C7/C10 interrupt response time for all cores.
Change-Id: I4f47502e1c212118d7cc89d4de60a1854072964a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/19675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/mediatek/mt8173/da9212.c')
0 files changed, 0 insertions, 0 deletions