mediatek/mt8173: Add SPI support

BUG=none
TEST=emerge-oak coreboot
BRANCH=none

[pg: split into multiple commits]

Change-Id: I82d982b40dd0bfaa7770a6b08c70b20337a46955
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 41acc14e9fe54924d20e4e5a2d1519251f0e1c87
Original-Change-Id: I2559be4191da9af523944563729171bd92a86cd0
Original-Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292661
Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/12611
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 3 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc
index ba0712b4d6..eec1cac61b 100644
--- a/src/soc/mediatek/mt8173/Makefile.inc
+++ b/src/soc/mediatek/mt8173/Makefile.inc
@@ -18,6 +18,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8173),y)
 bootblock-y += bootblock.c
 bootblock-y += cbfs.c
 bootblock-y += pll.c
+bootblock-y += spi.c
 bootblock-y += timer.c
 
 ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
@@ -33,11 +34,13 @@ romstage-y += timer.c
 
 romstage-$(CONFIG_DRIVERS_UART) += uart.c
 romstage-y += cbmem.c
+romstage-y += spi.c
 romstage-y += gpio.c
 
 ################################################################################
 
 ramstage-y += cbmem.c
+ramstage-y += spi.c
 ramstage-y += cbfs.c
 ramstage-y += soc.c
 ramstage-y += timer.c