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authorReka Norman <rekanorman@google.com>2022-08-17 16:18:55 +1000
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-08-27 15:58:26 +0000
commitf83b7d494e3ceb6bec11027ae5f21999ee5ad196 (patch)
tree9a797d577cc5e19d41f624b3c1a12a191f3defbc /src/soc/mediatek/common
parent2515c5e3135190cd105a13a07aed47407a077516 (diff)
drivers/mrc_cache: Don't compute checksum if TPM hash is used
When MRC_SAVE_HASH_IN_TPM is selected, mrc_data_valid() uses the TPM hash to verify the MRC cache data, not the checksum. However, we still calculate the checksum when updating the cache. Skip this calculation when MRC_SAVE_HASH_IN_TPM is selected to save boot time. On nissa, this reduces boot time by ~14 ms: Before: 3:after RAM initialization 854,298 (28,226) After: 3:after RAM initialization 849,626 (14,463) Note, the reason the calculation is so slow is that the new MRC data lives in CBMEM, which is not yet marked as cacheable in romstage. BUG=b:242667207 TEST=MRC caching still works as expected on nivviks. After clearing the MRC cache, memory training happens on the next boot, but doesn't on subsequent boots. Change-Id: Ifbb75ecfa17421c0565aec1f3eb48d950244f821 Signed-off-by: Reka Norman <rekanorman@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67042 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'src/soc/mediatek/common')
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