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authorRex-BC Chen <rex-bc.chen@mediatek.com>2022-06-13 19:01:51 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-07-06 15:33:07 +0000
commit7a0ca5ba8ffd8b84bcf6738bc07cce3d3889a760 (patch)
treed02929c358d8b87879c8de4e32b65349cab914a8 /src/soc/mediatek/common
parentccaafdfa5a9834a43134f0b5d0bafd8a0748eec6 (diff)
soc/mediatek: Move FLASH_DUAL_READ to common
FLASH_DUAL_READ is a common configuration for all MediaTek SoCs, so we move it to common folder and select it in SoCs' Kconfig. As suggested in CB:58837, we also rename FLASH_DUAL_READ to FLASH_DUAL_IO_READ to reduce confusion. TEST=build pass BUG=b:233720142 Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: If267a332519412a7919c5b7817047fabe4a564c8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65620 Reviewed-by: Yidi Lin <yidilin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/common')
-rw-r--r--src/soc/mediatek/common/Kconfig7
-rw-r--r--src/soc/mediatek/common/flash_controller.c2
2 files changed, 8 insertions, 1 deletions
diff --git a/src/soc/mediatek/common/Kconfig b/src/soc/mediatek/common/Kconfig
index 2adb34458d..119746b497 100644
--- a/src/soc/mediatek/common/Kconfig
+++ b/src/soc/mediatek/common/Kconfig
@@ -56,4 +56,11 @@ config USE_CBMEM_DRAM_INFO
The DRAM initialization will keep and return DRAM information (size,
geometry and other DDR info) so we can fill that into the CBMEM.
+config FLASH_DUAL_IO_READ
+ bool
+ default n
+ help
+ When this option is enabled, the flash controller provides the ability
+ to dual IO read mode.
+
endif
diff --git a/src/soc/mediatek/common/flash_controller.c b/src/soc/mediatek/common/flash_controller.c
index 3fe17f8612..c4c758ef19 100644
--- a/src/soc/mediatek/common/flash_controller.c
+++ b/src/soc/mediatek/common/flash_controller.c
@@ -142,7 +142,7 @@ static int nor_read(const struct spi_flash *flash, u32 addr, size_t len,
}
}
- if (CONFIG(FLASH_DUAL_READ)) {
+ if (CONFIG(FLASH_DUAL_IO_READ)) {
setbits8(&mtk_nor->read_dual, SFLASH_READ_DUAL_EN);
write8(&mtk_nor->prgdata[3], SFLASH_1_1_2_READ);
}