diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2022-12-11 10:21:59 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-13 14:26:41 +0000 |
commit | 50f651baeaea0143b329d72ac5e1ad77f7aa9714 (patch) | |
tree | 8a0e63e843d04b7a83034de461e3ca93639e1a8a /src/soc/mediatek/common | |
parent | b433470b02e773c182adffde654d3fcbb2b9f9b5 (diff) |
soc/mediatek/common: Use write32p()
Change-Id: I83707071fe1801322dffad7fc89afaef5617f3c7
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70577
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/common')
-rw-r--r-- | src/soc/mediatek/common/mcupm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/common/mcupm.c b/src/soc/mediatek/common/mcupm.c index dde10e21ca..9e58f073d9 100644 --- a/src/soc/mediatek/common/mcupm.c +++ b/src/soc/mediatek/common/mcupm.c @@ -11,7 +11,7 @@ static void reset_mcupm(struct mtk_mcu *mcu) { /* Clear abnormal boot register */ - write32((void *)ABNORMALBOOT_REG, 0x0); + write32p(ABNORMALBOOT_REG, 0x0); write32(&mcupm_reg->sw_rstn, 0x1); } |