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authorRex-BC Chen <rex-bc.chen@mediatek.com>2021-05-03 16:25:49 +0800
committerHung-Te Lin <hungte@chromium.org>2021-05-05 07:36:26 +0000
commit3d6816abcdc2a72d1553d5e94c7e5a9eed13feae (patch)
tree2d16a70e9d65b4294949a98416744fd6ca0f1add /src/soc/mediatek/common
parentbce4f2f70f5422e1d16d2d9efb4a29e484127b17 (diff)
soc/mediatek/mt8195: add pmif/spmi/pmic driver
MT8195 also uses mt6359p so we can reuse most drivers. The only differences are IO configuaration, clock setting, and PMIC internal setting related to soc. Reference datasheet: MT6315 datasheet v1.4.2.pdf, RH-D-2019-0616. Reference datasheet: MT6359_PMIC_Data_Sheet_V1.5.docx, RH-D-2018-0205. Change-Id: I73f9c9bf92837f262c15758f16dacf52261dd3a3 Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52668 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/common')
-rw-r--r--src/soc/mediatek/common/include/soc/pmif_clk_common.h8
-rw-r--r--src/soc/mediatek/common/include/soc/pmif_spmi.h3
-rw-r--r--src/soc/mediatek/common/include/soc/pmif_sw.h1
-rw-r--r--src/soc/mediatek/common/pmif_clk.c43
4 files changed, 54 insertions, 1 deletions
diff --git a/src/soc/mediatek/common/include/soc/pmif_clk_common.h b/src/soc/mediatek/common/include/soc/pmif_clk_common.h
new file mode 100644
index 0000000000..f1bd2c7cf8
--- /dev/null
+++ b/src/soc/mediatek/common/include/soc/pmif_clk_common.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __MEDIATEK_SOC_PMIF_CLK_COMMON__
+#define __MEDIATEK_SOC_PMIF_CLK_COMMON__
+
+int pmif_ulposc_cali(u32 target_val);
+
+#endif /*__MEDIATEK_SOC_PMIF_CLK_COMMON__*/
diff --git a/src/soc/mediatek/common/include/soc/pmif_spmi.h b/src/soc/mediatek/common/include/soc/pmif_spmi.h
index 142217d068..b6088b8e9b 100644
--- a/src/soc/mediatek/common/include/soc/pmif_spmi.h
+++ b/src/soc/mediatek/common/include/soc/pmif_spmi.h
@@ -25,7 +25,8 @@ struct mtk_spmi_mst_reg {
u32 op_st_sta;
u32 mst_sampl;
u32 mst_req_en;
- u32 reserved1[11];
+ u32 rcs_ctrl;
+ u32 reserved1[10];
u32 rec_ctrl;
u32 rec0;
u32 rec1;
diff --git a/src/soc/mediatek/common/include/soc/pmif_sw.h b/src/soc/mediatek/common/include/soc/pmif_sw.h
index 3b3e4dfb70..ea26446298 100644
--- a/src/soc/mediatek/common/include/soc/pmif_sw.h
+++ b/src/soc/mediatek/common/include/soc/pmif_sw.h
@@ -23,5 +23,6 @@ enum {
CAL_MAX_VAL = 0x7F,
};
+u32 pmif_get_ulposc_freq_mhz(u32 cali_val);
int pmif_clk_init(void);
#endif /* __SOC_MEDIATEK_PMIF_SW_H__ */
diff --git a/src/soc/mediatek/common/pmif_clk.c b/src/soc/mediatek/common/pmif_clk.c
new file mode 100644
index 0000000000..5b458a02c7
--- /dev/null
+++ b/src/soc/mediatek/common/pmif_clk.c
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <commonlib/helpers.h>
+#include <console/console.h>
+#include <soc/pmif_clk_common.h>
+#include <soc/pmif_sw.h>
+
+int pmif_ulposc_cali(u32 target_val)
+{
+ u32 current_val, min = 0, max = CAL_MAX_VAL, middle;
+ int diff_by_min, diff_by_max, cal_result;
+
+ do {
+ middle = (min + max) / 2;
+ if (middle == min)
+ break;
+
+ current_val = pmif_get_ulposc_freq_mhz(middle);
+ if (current_val > target_val)
+ max = middle;
+ else
+ min = middle;
+ } while (min <= max);
+
+ diff_by_min = pmif_get_ulposc_freq_mhz(min) - target_val;
+ diff_by_min = ABS(diff_by_min);
+
+ diff_by_max = pmif_get_ulposc_freq_mhz(max) - target_val;
+ diff_by_max = ABS(diff_by_max);
+
+ cal_result = (diff_by_min < diff_by_max) ? min : max;
+ current_val = pmif_get_ulposc_freq_mhz(cal_result);
+
+ /* check if calibrated value is in the range of target value +- 15% */
+ if (current_val < (target_val * (1000 - CAL_TOL_RATE) / 1000) ||
+ current_val > (target_val * (1000 + CAL_TOL_RATE) / 1000)) {
+ printk(BIOS_ERR, "[%s] calibration fail: cur=%d, CAL_RATE=%d, target=%dM\n",
+ __func__, current_val, CAL_TOL_RATE, target_val);
+ return 1;
+ }
+
+ return 0;
+}