summaryrefslogtreecommitdiff
path: root/src/soc/mediatek/common
diff options
context:
space:
mode:
authorMartin Roth <martin@coreboot.org>2021-10-01 14:53:22 -0600
committerMartin Roth <martinroth@google.com>2021-10-05 18:07:08 +0000
commit26f97f9532933da3c1d72a7918c8a24457bbc1c0 (patch)
tree8c25279e58ef541fae197ec193f5642a9b21b2d4 /src/soc/mediatek/common
parent50863daef8ed75c0cb3dfd375e7622c898de5821 (diff)
src/soc to src/superio: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ieafbc93e49fcef198ac6e31fc8a3b708c395e08e Reviewed-on: https://review.coreboot.org/c/coreboot/+/58082 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/common')
-rw-r--r--src/soc/mediatek/common/include/soc/eint_event.h2
-rw-r--r--src/soc/mediatek/common/mmu_operations.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/mediatek/common/include/soc/eint_event.h b/src/soc/mediatek/common/include/soc/eint_event.h
index 98db7b04e8..6d544b4e7a 100644
--- a/src/soc/mediatek/common/include/soc/eint_event.h
+++ b/src/soc/mediatek/common/include/soc/eint_event.h
@@ -6,7 +6,7 @@
#include <device/mmio.h>
#include <soc/addressmap.h>
-/* eint event mask cler register */
+/* eint event mask clear register */
struct eint_event_reg {
uint32_t eint_event_mask_clr[7];
};
diff --git a/src/soc/mediatek/common/mmu_operations.c b/src/soc/mediatek/common/mmu_operations.c
index 960d742d63..340f9ec989 100644
--- a/src/soc/mediatek/common/mmu_operations.c
+++ b/src/soc/mediatek/common/mmu_operations.c
@@ -50,6 +50,6 @@ void mtk_mmu_disable_l2c_sram(void)
mtk_soc_disable_l2c_sram();
- /* Reenable MMU with now enlarged L2 cache. Page tables still valid. */
+ /* Re-enable MMU with now enlarged L2 cache. Page tables still valid. */
mmu_enable();
}