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authorYidi Lin <yidi.lin@mediatek.com>2021-04-19 15:45:16 +0800
committerHung-Te Lin <hungte@chromium.org>2021-04-21 08:56:44 +0000
commit7ac11ca3d64615d1c77e48d31b1730bd67582168 (patch)
treee3f42bd2c6203ee2bfe272f0d0f515d60ce1843f /src/soc/mediatek/common
parentab686715f29ffd323a5880685b587981abddeac6 (diff)
soc/mediatek: Move mt8192 ufs driver to common
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I28eb13edcded95a9a4c17bdf92da9f792883a613 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52534 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/common')
-rw-r--r--src/soc/mediatek/common/include/soc/ufs.h17
-rw-r--r--src/soc/mediatek/common/ufs.c9
2 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/include/soc/ufs.h b/src/soc/mediatek/common/include/soc/ufs.h
new file mode 100644
index 0000000000..98bba9da1c
--- /dev/null
+++ b/src/soc/mediatek/common/include/soc/ufs.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_MEDIATEK_COMMON_UFS_H
+#define SOC_MEDIATEK_COMMON_UFS_H
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+
+void ufs_disable_refclk(void);
+
+enum ufshci_offset {
+ REG_UFS_REFCLK_CTRL = 0x144,
+};
+
+#define UFS_REFCLK_CTRL (UFSHCI_BASE + REG_UFS_REFCLK_CTRL)
+
+#endif /* SOC_MEDIATEK_COMMON_UFS_H */
diff --git a/src/soc/mediatek/common/ufs.c b/src/soc/mediatek/common/ufs.c
new file mode 100644
index 0000000000..2537fa7883
--- /dev/null
+++ b/src/soc/mediatek/common/ufs.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/ufs.h>
+
+void ufs_disable_refclk(void)
+{
+ /* disable ref clock to let UFSHCI release SPM signal */
+ write32((void *)UFS_REFCLK_CTRL, 0);
+}