mipi: Make panel init callback work directly on DSI transaction types

Our MIPI panel initialization framework differentiates between DCS and
GENERIC commands, but the exact interpretation of those terms is left to
the platform drivers. In practice, the MIPI DSI transaction codes for
these are standardized and platforms always need to do the same
operation of combining the command length and transfer type into a
correct DSI protocol code. This patch factors out the various
platform-specific DSI protocol definitions into a single global one and
moves the transaction type calculation into the common panel framework.

The Qualcomm SC7180 implementation which previously only supported DCS
commands is enhanced to (hopefully? untested for now...) also support
GENERIC commands. While we're rewriting that whole section also fix some
other issues about how exactly long and short commands need to be passed
to that hardware which we identified in the meantime.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I09ade7857ca04e89d286cf538b1a5ebb1eeb8c04
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57150
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>

2 files changed, 7 insertions, 155 deletions

diff --git a/src/soc/mediatek/common/dsi.c b/src/soc/mediatek/common/dsi.c
index fbf3cca2ec..a4556f5200 100644
--- a/src/soc/mediatek/common/dsi.c
+++ b/src/soc/mediatek/common/dsi.c
@@ -290,7 +290,7 @@ static void mtk_dsi_start(void)
 	write32(&dsi0->dsi_start, 1);
 }
 
-static bool mtk_dsi_is_read_command(u32 type)
+static bool mtk_dsi_is_read_command(enum mipi_dsi_transaction type)
 {
 	switch (type) {
 	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
@@ -298,11 +298,12 @@ static bool mtk_dsi_is_read_command(u32 type)
 	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
 	case MIPI_DSI_DCS_READ:
 		return true;
+	default:
+		return false;
 	}
-	return false;
 }
 
-static void mtk_dsi_cmdq(const u8 *data, u8 len, u32 type)
+static cb_err_t mtk_dsi_cmdq(enum mipi_dsi_transaction type, const u8 *data, u8 len)
 {
 	const u8 *tx_buf = data;
 	u32 config;
@@ -312,7 +313,7 @@ static void mtk_dsi_cmdq(const u8 *data, u8 len, u32 type)
 		printk(BIOS_ERR, "%s: cannot get DSI ready for sending commands"
 		       " after 20ms and the panel may not work properly.\n",
 		       __func__);
-		return;
+		return CB_ERR;
 	}
 	write32(&dsi0->dsi_intsta, 0);
 
@@ -344,53 +345,9 @@ static void mtk_dsi_cmdq(const u8 *data, u8 len, u32 type)
 	if (!wait_us(400, read32(&dsi0->dsi_intsta) & CMD_DONE_INT_FLAG)) {
 		printk(BIOS_ERR, "%s: failed sending DSI command, "
 		       "panel may not work.\n", __func__);
-		return;
-	}
-}
-
-static cb_err_t mtk_dsi_send_init_command(enum panel_init_cmd cmd, const u8 *data, u8 len)
-{
-	u32 type;
-
-	switch (cmd) {
-	case PANEL_CMD_DCS:
-		switch (len) {
-		case 0:
-			return CB_ERR;
-		case 1:
-			type = MIPI_DSI_DCS_SHORT_WRITE;
-			break;
-		case 2:
-			type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
-			break;
-		default:
-			type = MIPI_DSI_DCS_LONG_WRITE;
-			break;
-		}
-		break;
-
-	case PANEL_CMD_GENERIC:
-		switch (len) {
-		case 0:
-			type = MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM;
-			break;
-		case 1:
-			type = MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM;
-			break;
-		case 2:
-			type = MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM;
-			break;
-		default:
-			type = MIPI_DSI_GENERIC_LONG_WRITE;
-			break;
-		}
-		break;
-	default:
-		printk(BIOS_ERR, "Unsupported MIPI panel init command: %d\n", cmd);
 		return CB_ERR;
 	}
 
-	mtk_dsi_cmdq(data, len, type);
 	return CB_SUCCESS;
 }
 
@@ -420,7 +377,7 @@ int mtk_dsi_init(u32 mode_flags, u32 format, u32 lanes, const struct edid *edid,
 	mtk_dsi_clk_hs_mode_disable();
 	mtk_dsi_config_vdo_timing(mode_flags, format, lanes, edid, &phy_timing);
 	mtk_dsi_clk_hs_mode_enable();
-	mipi_panel_parse_init_commands(init_commands, mtk_dsi_send_init_command);
+	mipi_panel_parse_init_commands(init_commands, mtk_dsi_cmdq);
 	mtk_dsi_set_mode(mode_flags);
 	mtk_dsi_start();
 
diff --git a/src/soc/mediatek/common/include/soc/dsi_common.h b/src/soc/mediatek/common/include/soc/dsi_common.h
index 31abce026c..bc4bfa17a6 100644
--- a/src/soc/mediatek/common/include/soc/dsi_common.h
+++ b/src/soc/mediatek/common/include/soc/dsi_common.h
@@ -5,6 +5,7 @@
 
 #include <commonlib/helpers.h>
 #include <edid.h>
+#include <mipi/dsi.h>
 #include <types.h>
 #include <soc/addressmap.h>
 
@@ -212,112 +213,6 @@ enum {
 	DSI_FORCE_COMMIT_ALWAYS = BIT(1),
 };
 
-/* MIPI DSI Processor-to-Peripheral transaction types */
-enum {
-	MIPI_DSI_V_SYNC_START				= 0x01,
-	MIPI_DSI_V_SYNC_END				= 0x11,
-	MIPI_DSI_H_SYNC_START				= 0x21,
-	MIPI_DSI_H_SYNC_END				= 0x31,
-
-	MIPI_DSI_COLOR_MODE_OFF				= 0x02,
-	MIPI_DSI_COLOR_MODE_ON				= 0x12,
-	MIPI_DSI_SHUTDOWN_PERIPHERAL			= 0x22,
-	MIPI_DSI_TURN_ON_PERIPHERAL			= 0x32,
-
-	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM		= 0x03,
-	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM		= 0x13,
-	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM		= 0x23,
-
-	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM		= 0x04,
-	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM		= 0x14,
-	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM		= 0x24,
-
-	MIPI_DSI_DCS_SHORT_WRITE			= 0x05,
-	MIPI_DSI_DCS_SHORT_WRITE_PARAM			= 0x15,
-
-	MIPI_DSI_DCS_READ				= 0x06,
-
-	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE		= 0x37,
-
-	MIPI_DSI_END_OF_TRANSMISSION			= 0x08,
-
-	MIPI_DSI_NULL_PACKET				= 0x09,
-	MIPI_DSI_BLANKING_PACKET			= 0x19,
-	MIPI_DSI_GENERIC_LONG_WRITE			= 0x29,
-	MIPI_DSI_DCS_LONG_WRITE				= 0x39,
-
-	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	= 0x0c,
-	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24		= 0x1c,
-	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16		= 0x2c,
-
-	MIPI_DSI_PACKED_PIXEL_STREAM_30			= 0x0d,
-	MIPI_DSI_PACKED_PIXEL_STREAM_36			= 0x1d,
-	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12		= 0x3d,
-
-	MIPI_DSI_PACKED_PIXEL_STREAM_16			= 0x0e,
-	MIPI_DSI_PACKED_PIXEL_STREAM_18			= 0x1e,
-	MIPI_DSI_PIXEL_STREAM_3BYTE_18			= 0x2e,
-	MIPI_DSI_PACKED_PIXEL_STREAM_24			= 0x3e,
-};
-
-/* MIPI DSI Peripheral-to-Processor transaction types */
-enum {
-	MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT	= 0x02,
-	MIPI_DSI_RX_END_OF_TRANSMISSION			= 0x08,
-	MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE	= 0x11,
-	MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE	= 0x12,
-	MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE		= 0x1a,
-	MIPI_DSI_RX_DCS_LONG_READ_RESPONSE		= 0x1c,
-	MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE	= 0x21,
-	MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE	= 0x22,
-};
-
-/* MIPI DCS commands */
-enum {
-	MIPI_DCS_NOP			= 0x00,
-	MIPI_DCS_SOFT_RESET		= 0x01,
-	MIPI_DCS_GET_DISPLAY_ID		= 0x04,
-	MIPI_DCS_GET_RED_CHANNEL	= 0x06,
-	MIPI_DCS_GET_GREEN_CHANNEL	= 0x07,
-	MIPI_DCS_GET_BLUE_CHANNEL	= 0x08,
-	MIPI_DCS_GET_DISPLAY_STATUS	= 0x09,
-	MIPI_DCS_GET_POWER_MODE		= 0x0A,
-	MIPI_DCS_GET_ADDRESS_MODE	= 0x0B,
-	MIPI_DCS_GET_PIXEL_FORMAT	= 0x0C,
-	MIPI_DCS_GET_DISPLAY_MODE	= 0x0D,
-	MIPI_DCS_GET_SIGNAL_MODE	= 0x0E,
-	MIPI_DCS_GET_DIAGNOSTIC_RESULT	= 0x0F,
-	MIPI_DCS_ENTER_SLEEP_MODE	= 0x10,
-	MIPI_DCS_EXIT_SLEEP_MODE	= 0x11,
-	MIPI_DCS_ENTER_PARTIAL_MODE	= 0x12,
-	MIPI_DCS_ENTER_NORMAL_MODE	= 0x13,
-	MIPI_DCS_EXIT_INVERT_MODE	= 0x20,
-	MIPI_DCS_ENTER_INVERT_MODE	= 0x21,
-	MIPI_DCS_SET_GAMMA_CURVE	= 0x26,
-	MIPI_DCS_SET_DISPLAY_OFF	= 0x28,
-	MIPI_DCS_SET_DISPLAY_ON		= 0x29,
-	MIPI_DCS_SET_COLUMN_ADDRESS	= 0x2A,
-	MIPI_DCS_SET_PAGE_ADDRESS	= 0x2B,
-	MIPI_DCS_WRITE_MEMORY_START	= 0x2C,
-	MIPI_DCS_WRITE_LUT		= 0x2D,
-	MIPI_DCS_READ_MEMORY_START	= 0x2E,
-	MIPI_DCS_SET_PARTIAL_AREA	= 0x30,
-	MIPI_DCS_SET_SCROLL_AREA	= 0x33,
-	MIPI_DCS_SET_TEAR_OFF		= 0x34,
-	MIPI_DCS_SET_TEAR_ON		= 0x35,
-	MIPI_DCS_SET_ADDRESS_MODE	= 0x36,
-	MIPI_DCS_SET_SCROLL_START	= 0x37,
-	MIPI_DCS_EXIT_IDLE_MODE		= 0x38,
-	MIPI_DCS_ENTER_IDLE_MODE	= 0x39,
-	MIPI_DCS_SET_PIXEL_FORMAT	= 0x3A,
-	MIPI_DCS_WRITE_MEMORY_CONTINUE	= 0x3C,
-	MIPI_DCS_READ_MEMORY_CONTINUE	= 0x3E,
-	MIPI_DCS_SET_TEAR_SCANLINE	= 0x44,
-	MIPI_DCS_GET_SCANLINE		= 0x45,
-	MIPI_DCS_READ_DDB_START		= 0xA1,
-	MIPI_DCS_READ_DDB_CONTINUE	= 0xA8,
-};
-
 struct mtk_phy_timing {
 	u8 lpx;
 	u8 da_hs_prepare;