diff options
| author | Ran Bi <ran.bi@mediatek.com> | 2019-04-17 15:43:14 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-06 18:20:46 +0000 |
| commit | fcfa35670a191d2313324fb313bac237e7a3d0c6 (patch) | |
| tree | f99a682c23ff9dfd5b4eac5847058f3f1cc4e95e /src/soc/mediatek/common | |
| parent | e458bcd099b5fd97c39a424bcc47e99818942487 (diff) | |
mediatek/mt8183: Enable RTC eosc calibration feature to save power
When system shuts down, RTC enable eosc calibration feature to save
power. Then coreboot RTC driver needs to call rtc_enable_dcxo function
at every boot to switch RTC clock source to dcxo.
BUG=b:128467245
BRANCH=none
TEST=Boots correctly on Kukui
Change-Id: Iee21e7611df8959cbbc63b6e6655cfb462147748
Signed-off-by: Ran Bi <ran.bi@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32339
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/common')
| -rw-r--r-- | src/soc/mediatek/common/rtc.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/mediatek/common/rtc.c b/src/soc/mediatek/common/rtc.c index a9142b612d..fe252b5d64 100644 --- a/src/soc/mediatek/common/rtc.c +++ b/src/soc/mediatek/common/rtc.c @@ -91,12 +91,15 @@ int rtc_xosc_write(u16 val) u16 bbpu; rtc_write(RTC_OSC32CON, RTC_OSC32CON_UNLOCK1); - udelay(200); + if (!rtc_busy_wait()) + return 0; rtc_write(RTC_OSC32CON, RTC_OSC32CON_UNLOCK2); - udelay(200); + if (!rtc_busy_wait()) + return 0; rtc_write(RTC_OSC32CON, val); - udelay(200); + if (!rtc_busy_wait()) + return 0; rtc_read(RTC_BBPU, &bbpu); bbpu |= RTC_BBPU_KEY | RTC_BBPU_RELOAD; |