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author | Jincheng Li <jincheng.li@intel.com> | 2024-07-01 14:09:37 +0800 |
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committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-07-24 09:18:41 +0000 |
commit | c19e32e69d8a9e42346fe81432bbdfc1e1c8febc (patch) | |
tree | effdfee7fa08c03e3ce270d638501f5d5634ac24 /src/soc/mediatek/common/wdt.c | |
parent | dc8123a775e9732e13092f5bf6a4d623b4d97b0d (diff) |
soc/intel/xeon_sp: Share save_dimm_info among Xeon-SP SoCs
TEST=Build and boot on archercity CRB
No changes in boot log and 'dmidecode' result under centos
TEST=Build and boot on avenuecity CRB
It will add DMI type 16,17,19,20
Change-Id: I2f5b7a4ffabed033d54d4724b3c41246503166fe
Signed-off-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83325
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/mediatek/common/wdt.c')
0 files changed, 0 insertions, 0 deletions