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| author | Yu-Ping Wu <yupingso@chromium.org> | 2019-10-14 16:56:50 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-17 15:04:26 +0000 |
| commit | e67dce0f9467340679950dab8fbe6dfe4f0ce1ba (patch) | |
| tree | 2ccc25b14f95e7bb8b565ae0a936dd0e7b715064 /src/soc/mediatek/common/uart.c | |
| parent | 553e2db9514919c14df63de7a8bfbfdbfe3def1b (diff) | |
soc/mediatek/mt8183: Verify checksum of cached calibration data
The checksum is stored in the header of calibration data and saved to
SPI flash. After reading the data from flash, checksum is used to verify
the integrity of the calibration parameters.
BUG=b:139099592
BRANCH=kukui
TEST=Calibration data successfully loaded from flash
Change-Id: Ie4a0688ed6e560d4c0c6b316f44e52fd10d71a9d
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36014
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek/common/uart.c')
0 files changed, 0 insertions, 0 deletions