mediatek: Move uart, timer and cbmem code to a common directory.

This patch moves uart, timer and cbmem code which can be reused into a
common directory under soc/mediatek.

BUG=b:80501386
BRANCH=none
TEST=the refactored code works fine on the new platform (with the rest
     of the patches applied) and Elm platform

Change-Id: I5210149b324947ee90f1a481b42f0e2e1f7cfc25
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/26658
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>

1 files changed, 47 insertions, 0 deletions

diff --git a/src/soc/mediatek/common/timer.c b/src/soc/mediatek/common/timer.c
new file mode 100644
index 0000000000..6e4315c7cf
--- /dev/null
+++ b/src/soc/mediatek/common/timer.c
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <compiler.h>
+#include <console/console.h>
+#include <timer.h>
+#include <delay.h>
+#include <thread.h>
+
+#include <soc/addressmap.h>
+#include <soc/timer.h>
+
+static struct mtk_gpt_regs *const mtk_gpt = (void *)GPT_BASE;
+
+__weak void timer_prepare(void) { /* do nothing */ }
+
+void timer_monotonic_get(struct mono_time *mt)
+{
+	mono_time_set_usecs(mt, read32(&mtk_gpt->gpt4_cnt) / GPT4_MHZ);
+}
+
+void init_timer(void)
+{
+	timer_prepare();
+
+	/* Disable GPT4 and clear the counter */
+	clrbits_le32(&mtk_gpt->gpt4_con, GPT_CON_EN);
+	setbits_le32(&mtk_gpt->gpt4_con, GPT_CON_CLR);
+
+	/* Set clock source to system clock and set clock divider to 1 */
+	write32(&mtk_gpt->gpt4_clk, GPT_SYS_CLK | GPT_CLK_DIV1);
+	/* Set operation mode to FREERUN mode and enable GTP4 */
+	write32(&mtk_gpt->gpt4_con, GPT_CON_EN | GPT_MODE_FREERUN);
+}