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authorMengqi Zhang <Mengqi.Zhang@mediatek.com>2019-04-24 11:11:52 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-06-21 08:38:41 +0000
commit026be3d76f3934eb901485acd98e0d84f137068f (patch)
treec269b874ad1fccd60889cc0fac94dd1f746608a7 /src/soc/mediatek/common/spi.c
parent89b1753c2289edacca05ef46e840f212f2a3025d (diff)
mediatek: Add SPI tick_dly setting
Add spi tick_dly setting for high-speed spi xfer. BUG=b:80501386 BRANCH=none TEST=emerge-kukui coreboot; emerge-elm coreboot Change-Id: Ie49fc3efe2a4a6dcdf2a2fc4c91b47e35d4f086e Signed-off-by: Mengqi Zhang <Mengqi.Zhang@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32461 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/common/spi.c')
-rw-r--r--src/soc/mediatek/common/spi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/mediatek/common/spi.c b/src/soc/mediatek/common/spi.c
index 71ed95a228..1af6f105c3 100644
--- a/src/soc/mediatek/common/spi.c
+++ b/src/soc/mediatek/common/spi.c
@@ -53,7 +53,7 @@ static void spi_sw_reset(struct mtk_spi_regs *regs)
}
void mtk_spi_init(unsigned int bus, enum spi_pad_mask pad_select,
- unsigned int speed_hz)
+ unsigned int speed_hz, unsigned int tick_dly)
{
u32 div, sck_ticks, cs_ticks;
@@ -73,7 +73,7 @@ void mtk_spi_init(unsigned int bus, enum spi_pad_mask pad_select,
printk(BIOS_DEBUG, "SPI%u(PAD%u) initialized at %u Hz\n",
bus, pad_select, SPI_HZ / (sck_ticks * 2));
- mtk_spi_set_timing(regs, sck_ticks, cs_ticks);
+ mtk_spi_set_timing(regs, sck_ticks, cs_ticks, tick_dly);
clrsetbits_le32(&regs->spi_cmd_reg,
(SPI_CMD_CPHA_EN | SPI_CMD_CPOL_EN |