diff options
author | Yidi Lin <yidi.lin@mediatek.com> | 2021-02-02 21:00:36 +0800 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2021-04-28 02:41:43 +0000 |
commit | 2368a310be4bf60ea9c83fc89e89be9d6a040775 (patch) | |
tree | 9c346d5c793178b25d3bfeceb756cbe3ffcb5d75 /src/soc/mediatek/common/mt6315.c | |
parent | 15ddb363d4d869fa1c3512e7fbf9682ec41375bf (diff) |
soc/mediatek: Move the common part of PMIC drivers to common/
The PMIC drivers can be shared by MT8192 and MT8195.
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: Ie17e01d25405b1e5119d9c70c5f7afb915daf80b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/common/mt6315.c')
-rw-r--r-- | src/soc/mediatek/common/mt6315.c | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/mt6315.c b/src/soc/mediatek/common/mt6315.c new file mode 100644 index 0000000000..928d5499be --- /dev/null +++ b/src/soc/mediatek/common/mt6315.c @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <delay.h> +#include <soc/mt6315.h> +#include <soc/pmif.h> + +static struct pmif *pmif_arb = NULL; + +static void mt6315_read(u32 slvid, u32 reg, u32 *data) +{ + pmif_arb->read(pmif_arb, slvid, reg, data); +} + +static void mt6315_write(u32 slvid, u32 reg, u32 data) +{ + pmif_arb->write(pmif_arb, slvid, reg, data); +} + +void mt6315_write_field(u32 slvid, u32 reg, u32 val, u32 mask, u32 shift) +{ + pmif_arb->write_field(pmif_arb, slvid, reg, val, mask, shift); +} + +static void mt6315_wdt_enable(u32 slvid) +{ + mt6315_write(slvid, 0x3A9, 0x63); + mt6315_write(slvid, 0x3A8, 0x15); + mt6315_write(slvid, 0x127, 0x2); + mt6315_write(slvid, 0x127, 0x1); + mt6315_write(slvid, 0x127, 0x8); + udelay(50); + mt6315_write(slvid, 0x128, 0x8); + mt6315_write(slvid, 0x3A8, 0); + mt6315_write(slvid, 0x3A9, 0); +} + +void mt6315_buck_set_voltage(u32 slvid, u32 buck_id, u32 buck_uv) +{ + unsigned int vol_reg, vol_val; + + if (!pmif_arb) + die("ERROR: pmif_arb not initialized"); + + switch (buck_id) { + case MT6315_BUCK_1: + vol_reg = MT6315_BUCK_TOP_ELR0; + break; + case MT6315_BUCK_3: + vol_reg = MT6315_BUCK_TOP_ELR3; + break; + default: + die("ERROR: Unknown buck_id %u", buck_id); + return; + }; + + vol_val = buck_uv / 6250; + mt6315_write(slvid, vol_reg, vol_val); +} + +u32 mt6315_buck_get_voltage(u32 slvid, u32 buck_id) +{ + u32 vol_reg, vol; + + if (!pmif_arb) + die("ERROR: pmif_arb not initialized"); + + switch (buck_id) { + case MT6315_BUCK_1: + vol_reg = MT6315_BUCK_VBUCK1_DBG0; + break; + case MT6315_BUCK_3: + vol_reg = MT6315_BUCK_VBUCK1_DBG3; + break; + default: + die("ERROR: Unknown buck_id %u", buck_id); + return 0; + }; + + mt6315_read(slvid, vol_reg, &vol); + return vol * 6250; +} + +static void init_pmif_arb(void) +{ + if (!pmif_arb) { + pmif_arb = get_pmif_controller(PMIF_SPMI, 0); + if (!pmif_arb) + die("ERROR: No spmi device"); + } + + if (pmif_arb->is_pmif_init_done(pmif_arb)) + die("ERROR - Failed to initialize pmif spmi"); +} + +void mt6315_init(void) +{ + init_pmif_arb(); + mt6315_wdt_enable(MT6315_CPU); + mt6315_wdt_enable(MT6315_GPU); + mt6315_init_setting(); +} |