diff options
author | Shaoming Chen <shaoming.chen@mediatek.corp-partner.google.com> | 2020-12-23 11:45:59 +0800 |
---|---|---|
committer | Hung-Te Lin <hungte@chromium.org> | 2021-01-01 02:58:33 +0000 |
commit | 9e38efc27be1e5561da611b1e570ef3a52529da2 (patch) | |
tree | 6d4ecc1c053638cc5731140810d26181ff18cca5 /src/soc/mediatek/common/include | |
parent | b32e4d67637f6b9dd9c46309ca623d80465a561f (diff) |
soc/mediatek: dsi: Fix EoTp flag
SoC will transmit the EoTp (End of Transmission packet) when
MIPI_DSI_MODE_EOT_PACKET flag is set.
Enabling EoTp will make the line time larger, so the hfp and
hbp should be reduced to keep line time.
BUG=b:168728787
BRANCH=kukui
TEST=Display is normal on Kukui
Signed-off-by: Shaoming Chen <shaoming.chen@mediatek.corp-partner.google.com>
Change-Id: Ifadd0def13cc264e9d39ab9c981fbdc996396bfa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48868
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/common/include')
-rw-r--r-- | src/soc/mediatek/common/include/soc/dsi_common.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/include/soc/dsi_common.h b/src/soc/mediatek/common/include/soc/dsi_common.h index 7bacec1c77..aebe62aa36 100644 --- a/src/soc/mediatek/common/include/soc/dsi_common.h +++ b/src/soc/mediatek/common/include/soc/dsi_common.h @@ -118,6 +118,12 @@ enum { MIX_MODE = BIT(17) }; +/* DSI_TXRX_CTRL */ +enum { + EOTP_DISABLE = BIT(6), + NON_CONTINUOUS_CLK = BIT(16), +}; + /* DSI_PSCTRL */ enum { DSI_PS_WC = 0x3fff, |