diff options
| author | Hung-Te Lin <hungte@chromium.org> | 2019-08-07 10:31:27 +0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2019-08-15 00:19:40 +0000 |
| commit | 75e4314675cecf6faf7c02920a86f3157e6ba5c1 (patch) | |
| tree | 6f9afb6c2d3d23ad766f2be495a6e910aaac03eb /src/soc/mediatek/common/include | |
| parent | 3b217d5c69de950fde7a15e0c3c109b40f64a9c4 (diff) | |
soc/mediatek: dsi: Support sending MIPI init commands
For systems with real MIPI panels (8173/oak was using PS8640 eDP
bridge), we have to send DCS commands to initialize panel.
BUG=b:80501386,b:117254947
TEST=make -j # board = oak and boots
Change-Id: Ie7c824873465ac82a95bcb0ed67b8b9866987008
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34773
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/common/include')
| -rw-r--r-- | src/soc/mediatek/common/include/soc/dsi_common.h | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/src/soc/mediatek/common/include/soc/dsi_common.h b/src/soc/mediatek/common/include/soc/dsi_common.h index 0738876aea..3f4a47d1b8 100644 --- a/src/soc/mediatek/common/include/soc/dsi_common.h +++ b/src/soc/mediatek/common/include/soc/dsi_common.h @@ -85,14 +85,14 @@ struct dsi_regs { u8 reserved4[16]; u32 dsi_vm_cmd_con; u8 reserved5[204]; - u32 dsi_cmdq0; + u32 dsi_cmdq[128]; }; static struct dsi_regs *const dsi0 = (void *)DSI0_BASE; check_member(dsi_regs, dsi_phy_lccon, 0x104); check_member(dsi_regs, dsi_phy_timecon3, 0x11c); check_member(dsi_regs, dsi_vm_cmd_con, 0x130); -check_member(dsi_regs, dsi_cmdq0, 0x200); +check_member(dsi_regs, dsi_cmdq, 0x200); /* DSI_INTSTA */ enum { @@ -324,6 +324,18 @@ struct mtk_phy_timing { u32 d_phy; }; +/* Definitions for cmd in lcm_init_command */ +#define LCM_END_CMD 0 +#define LCM_DELAY_CMD 1 +#define LCM_GENERIC_CMD 2 +#define LCM_DCS_CMD 3 + +struct lcm_init_command { + u16 cmd; + u16 len; + u8 data[8]; +}; + /* Functions that each SOC should provide. */ void mtk_dsi_reset(void); void mtk_dsi_configure_mipi_tx(int data_rate, u32 lanes); @@ -332,7 +344,8 @@ void mtk_dsi_configure_mipi_tx(int data_rate, u32 lanes); void mtk_dsi_override_phy_timing(struct mtk_phy_timing *timing); /* Public API provided in common/dsi.c */ -int mtk_dsi_init(u32 mode_flags, u32 format, u32 lanes, - const struct edid *edid); +int mtk_dsi_bpp_from_format(u32 format); +int mtk_dsi_init(u32 mode_flags, u32 format, u32 lanes, const struct edid *edid, + const struct lcm_init_command *init_commands); #endif /* SOC_MEDIATEK_DSI_COMMON_H */ |