diff options
| author | Yidi Lin <yidilin@chromium.org> | 2024-05-29 17:21:30 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-10 01:10:20 +0000 |
| commit | db5dbdf310bca698acaa4ce945692ef59147aca4 (patch) | |
| tree | 5d1194ff007e0de747109e3329d457bedc41233b /src/soc/mediatek/common/include | |
| parent | b60cfb89e99bd2c6a7136b99385eb1fbe5b8e85d (diff) | |
soc/mediatek/common: Refactor EINT driver
Refactor EINT driver by
- Move `pos_bit_calc_for_eint` to `common/gpio_eint_v1.c` and rename to
`gpio_calc_eint_pos_bit`.
- Implement `gpio_get_eint_reg` to obtain EINT base address.
This change is prepared for the driver change in MT8196.
BUG=b:334723688
TEST=EINT works on Geralt
Change-Id: Ie53abc23971bfa39250ebd7dd48e28d6b91c5973
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83703
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/common/include')
| -rw-r--r-- | src/soc/mediatek/common/include/soc/gpio_common.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/soc/mediatek/common/include/soc/gpio_common.h b/src/soc/mediatek/common/include/soc/gpio_common.h index b12d9c92c5..870dac59ea 100644 --- a/src/soc/mediatek/common/include/soc/gpio_common.h +++ b/src/soc/mediatek/common/include/soc/gpio_common.h @@ -102,8 +102,6 @@ struct eint_regs { check_member(eint_regs, d1en, 0x420); -static struct eint_regs *const mtk_eint = (void *)(EINT_BASE); - /* * Firmware never enables interrupts on this platform. This function * reads current EINT status and clears the pending interrupt. @@ -117,4 +115,11 @@ int gpio_eint_poll(gpio_t gpio); */ void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type); +enum { + MAX_EINT_REG_BITS = 32, +}; + +void gpio_calc_eint_pos_bit(gpio_t gpio, u32 *pos, u32 *bit); +struct eint_regs *gpio_get_eint_reg(gpio_t gpio); + #endif |