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authorV Sowmya <v.sowmya@intel.com>2017-07-12 14:27:09 +0530
committerAaron Durbin <adurbin@chromium.org>2017-08-15 23:11:16 +0000
commit752dc8e4258b708dc4a96b3d929163b1560492ae (patch)
tree35778030113a6f0936c7774ef4e6520050e25917 /src/soc/marvell
parent1e6b980b1ec49e5ffdfb34e5373f13e82db67fb7 (diff)
soc/intel/apollolake: Rename SRAM BAR0 and BAR2 macros
Rename BAR0 and BAR2 SRAM base and size macros to align with the spec. * PMC_SRAM_BASE_0 -> SRAM_BASE_0 * PMC_SRAM_SIZE_0 -> SRAM_SIZE_0 * PMC_SRAM_BASE_1 -> SRAM_BASE_2 * PMC_SRAM_SIZE_1 -> SRAM_SIZE_2 Change-Id: I48d65c30368c4500549b535341b14ca262d7fc48 Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/20539 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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