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authorJulius Werner <jwerner@chromium.org>2014-10-20 14:21:22 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-09 15:49:33 +0200
commit7d186633170b78f7c83b154f41dc0f8336310715 (patch)
tree8b0c22eec289528d5816056d96da9c954698d2a8 /src/soc/marvell/bg4cd/include
parentc8385ddd3b7c24d33fdf3f7d59674f143ce04b4c (diff)
bg4cd: Change all SoC headers to <soc/headername.h> system
This patch aligns bg4cd to the new SoC header include scheme. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Tested with whole series. Compiled Cosmos. Change-Id: I32a4407f7deb2b1752b6220a140352724f320637 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0b6bb6990417863010258632374c3f5ac19350c9 Original-Change-Id: Ia5299659ad186f2e7d698adfa7562396e747473f Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/224506 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9358 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/marvell/bg4cd/include')
-rw-r--r--src/soc/marvell/bg4cd/include/soc/i2c.h26
-rw-r--r--src/soc/marvell/bg4cd/include/soc/memlayout.ld39
-rw-r--r--src/soc/marvell/bg4cd/include/soc/sdram.h24
3 files changed, 89 insertions, 0 deletions
diff --git a/src/soc/marvell/bg4cd/include/soc/i2c.h b/src/soc/marvell/bg4cd/include/soc/i2c.h
new file mode 100644
index 0000000000..40db31a9ee
--- /dev/null
+++ b/src/soc/marvell/bg4cd/include/soc/i2c.h
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __SOC_MARVELL_BG4CD_I2C_H__
+#define __SOC_MARVELL_BG4CD_I2C_H__
+
+void i2c_init(unsigned int bus, unsigned int hz);
+
+#endif
+
diff --git a/src/soc/marvell/bg4cd/include/soc/memlayout.ld b/src/soc/marvell/bg4cd/include/soc/memlayout.ld
new file mode 100644
index 0000000000..45cf3950c3
--- /dev/null
+++ b/src/soc/marvell/bg4cd/include/soc/memlayout.ld
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <memlayout.h>
+#include <vendorcode/google/chromeos/memlayout.h>
+
+#include <arch/header.ld>
+
+SECTIONS
+{
+ DRAM_START(0x00000000)
+ RAMSTAGE(0x00200000, 128K)
+ POSTRAM_CBFS_CACHE(0x01000000, 1M)
+
+ SRAM_START(0x80000000)
+ TTB(0x80000000, 16K)
+ BOOTBLOCK(0x80004004, 16K - 4)
+ VBOOT2_WORK(0x80008000, 16K)
+ OVERLAP_VERSTAGE_ROMSTAGE(0x8000C000, 40K)
+ PRERAM_CBFS_CACHE(0x80016000, 4K)
+ STACK(0x80017000, 4K)
+ SRAM_END(0x80018000)
+}
diff --git a/src/soc/marvell/bg4cd/include/soc/sdram.h b/src/soc/marvell/bg4cd/include/soc/sdram.h
new file mode 100644
index 0000000000..6850d2752a
--- /dev/null
+++ b/src/soc/marvell/bg4cd/include/soc/sdram.h
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __SOC_MARVELL_BG4CD_SDRAM_H__
+#define __SOC_MARVELL_BG4CD_SDRAM_H__
+
+void sdram_init(void);
+#endif