soc/marvell/armada38x: Add generic support for armada38x

Skeleton for soc armada38x

BUG=chrome-os-partner:47462
TEST=None
BRANCH=tot

Change-Id: I76f631ee6cdfc90c44727cb20aa960796bc785a5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e91cc19468325f005c6ac920bbe27a174c409727
Original-Change-Id: Iac5fc34df1ba18b4515029aa2fcff8f78a5df191
Original-Signed-off-by: Ruilin Hao <rlhao@marvell.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/313179
Original-Commit-Ready: Kan Yan <kyan@google.com>
Original-Tested-by: Kan Yan <kyan@google.com>
Original-Reviewed-by: Kan Yan <kyan@google.com>
Reviewed-on: https://review.coreboot.org/13110
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 55 insertions, 0 deletions

diff --git a/src/soc/marvell/armada38x/soc.c b/src/soc/marvell/armada38x/soc.c
new file mode 100644
index 0000000000..d049391b8e
--- /dev/null
+++ b/src/soc/marvell/armada38x/soc.c
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <vendorcode/google/chromeos/chromeos.h>
+#include <symbols.h>
+
+#define RESERVED_SIZE_KB (1 * KiB)
+
+static void soc_enable(device_t dev)
+{
+	/* Reserve bottom 1M bytes for MMU/TTB */
+	reserved_ram_resource(dev, 0, ((uintptr_t)_dram / KiB +
+	    (CONFIG_DRAM_SIZE_MB * KiB - RESERVED_SIZE_KB)),
+	    RESERVED_SIZE_KB);
+	ram_resource(dev, 0, (uintptr_t)_dram / KiB,
+		     (CONFIG_DRAM_SIZE_MB * KiB) - RESERVED_SIZE_KB);
+}
+
+static void soc_init(device_t dev)
+{
+	printk(BIOS_INFO, "CPU: Armada 38X\n");
+}
+
+static struct device_operations soc_ops = {
+	.read_resources = DEVICE_NOOP,
+	.set_resources = DEVICE_NOOP,
+	.enable_resources = soc_enable,
+	.init = soc_init,
+	.scan_bus = 0,
+};
+
+static void enable_armada38x_dev(device_t dev)
+{
+	dev->ops = &soc_ops;
+}
+
+struct chip_operations soc_marvell_armada38x_ops = {
+	CHIP_NAME("SOC Marvell Armada 38x")
+	.enable_dev = enable_armada38x_dev,
+};