diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-01-28 16:11:31 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-15 08:19:03 +0000 |
| commit | f76822a75cc02064a8e8fb82602aeca76b140c7c (patch) | |
| tree | 45321504e47fedd8d92a8b16d35e6f42350a1b2f /src/soc/intel | |
| parent | 19d4364ed637a62c607abe9ef41955efd9f795b4 (diff) | |
soc/intel/broadwell/pch: Rename GPIO identifiers
Rename structs, types and functions to match Lynx Point's names.
Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical.
Change-Id: I11ea27b00b5820eb5553712e0420836470ec0d27
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50064
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/gpio.h | 6 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/gpio.c | 22 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/romstage.c | 2 |
3 files changed, 15 insertions, 15 deletions
diff --git a/src/soc/intel/broadwell/include/soc/gpio.h b/src/soc/intel/broadwell/include/soc/gpio.h index e11ceb8ac5..990b7b8e43 100644 --- a/src/soc/intel/broadwell/include/soc/gpio.h +++ b/src/soc/intel/broadwell/include/soc/gpio.h @@ -149,7 +149,7 @@ .owner = GPIO_OWNER_GPIO, \ .conf1 = GPIO_SENSE_DISABLE } -struct gpio_config { +struct pch_lp_gpio_map { u8 gpio; u32 conf0; u32 conf1; @@ -162,7 +162,7 @@ struct gpio_config { } __packed; /* Configure GPIOs with mainboard provided settings */ -void init_gpios(const struct gpio_config config[]); +void setup_pch_lp_gpios(const struct pch_lp_gpio_map map[]); /* Get GPIO pin value */ int get_gpio(int gpio_num); @@ -179,6 +179,6 @@ int gpio_is_native(int gpio_num); */ unsigned int get_gpios(const int *gpio_num_array); -extern const struct gpio_config mainboard_gpio_config[]; +extern const struct pch_lp_gpio_map mainboard_gpio_map[]; #endif diff --git a/src/soc/intel/broadwell/pch/gpio.c b/src/soc/intel/broadwell/pch/gpio.c index ff1f019ce0..952329117e 100644 --- a/src/soc/intel/broadwell/pch/gpio.c +++ b/src/soc/intel/broadwell/pch/gpio.c @@ -36,9 +36,9 @@ static int gpio_to_pirq(int gpio) }; } -void init_gpios(const struct gpio_config config[]) +void setup_pch_lp_gpios(const struct pch_lp_gpio_map map[]) { - const struct gpio_config *entry; + const struct pch_lp_gpio_map *config; u32 owner[3] = {0}; u32 route[3] = {0}; u32 irqen[3] = {0}; @@ -47,29 +47,29 @@ void init_gpios(const struct gpio_config config[]) u16 pirq2apic = 0; int set, bit, gpio = 0; - for (entry = config; entry->conf0 != GPIO_LIST_END; entry++, gpio++) { + for (config = map; config->conf0 != GPIO_LIST_END; config++, gpio++) { if (gpio > MAX_GPIO_NUMBER) break; /* Setup Configuration registers 1 and 2 */ - outl(entry->conf0, GPIO_BASE_ADDRESS + GPIO_CONFIG0(gpio)); - outl(entry->conf1, GPIO_BASE_ADDRESS + GPIO_CONFIG1(gpio)); + outl(config->conf0, GPIO_BASE_ADDRESS + GPIO_CONFIG0(gpio)); + outl(config->conf1, GPIO_BASE_ADDRESS + GPIO_CONFIG1(gpio)); /* Determine set and bit based on GPIO number */ set = gpio >> 5; bit = gpio % 32; /* Apply settings to set specific bits */ - owner[set] |= entry->owner << bit; - route[set] |= entry->route << bit; - irqen[set] |= entry->irqen << bit; - reset[set] |= entry->reset << bit; + owner[set] |= config->owner << bit; + route[set] |= config->route << bit; + irqen[set] |= config->irqen << bit; + reset[set] |= config->reset << bit; if (set == 0) - blink |= entry->blink << bit; + blink |= config->blink << bit; /* PIRQ to IO-APIC map */ - if (entry->pirq == GPIO_PIRQ_APIC_ROUTE) { + if (config->pirq == GPIO_PIRQ_APIC_ROUTE) { set = gpio_to_pirq(gpio); if (set >= 0) pirq2apic |= 1 << set; diff --git a/src/soc/intel/broadwell/romstage.c b/src/soc/intel/broadwell/romstage.c index 33b4e4a02a..b9570f3e68 100644 --- a/src/soc/intel/broadwell/romstage.c +++ b/src/soc/intel/broadwell/romstage.c @@ -50,7 +50,7 @@ void mainboard_romstage_entry(void) set_max_freq(); /* Initialize GPIOs */ - init_gpios(mainboard_gpio_config); + setup_pch_lp_gpios(mainboard_gpio_map); mainboard_fill_pei_data(&pei_data); mainboard_fill_spd_data(&pei_data); |