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authorMichael Niewöhner <foss@mniewoehner.de>2020-10-19 12:31:21 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-10-21 07:16:01 +0000
commitf50ea988b09e7201e129848ab64e6e0e69bf56c4 (patch)
treee7cf17631d7c3cd41fa3c68a4c578d4ee7e36b8a /src/soc/intel
parentdadcbfbe8c682c89b277fdbdfdd26cabd15fc20a (diff)
soc/intel,mb/*: get rid of legacy pad macros
Get rid of legacy pad macros by replacing them with their newer equivalents. TEST: TIMELESS-built board images match Change-Id: I078f9bb3c78f642afc6dcfd64d77be823a4485c2 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46567 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/common/block/gpio/Kconfig5
-rw-r--r--src/soc/intel/common/block/include/intelblocks/gpio_defs.h28
-rw-r--r--src/soc/intel/skylake/Kconfig1
-rw-r--r--src/soc/intel/xeon_sp/Kconfig1
4 files changed, 0 insertions, 35 deletions
diff --git a/src/soc/intel/common/block/gpio/Kconfig b/src/soc/intel/common/block/gpio/Kconfig
index 753d8e0a7e..7e8970646f 100644
--- a/src/soc/intel/common/block/gpio/Kconfig
+++ b/src/soc/intel/common/block/gpio/Kconfig
@@ -24,11 +24,6 @@ config SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY
bool
default n
-# Used to provide support for legacy macros
-config SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
- bool
- default n
-
# Indicate if multiple ACPI devices are used for each gpio community.
config SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES
bool
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
index 31bbde0ce2..422720b921 100644
--- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
+++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
@@ -302,40 +302,12 @@
PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), \
PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE))
-#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS)
-
-#define PAD_CFG_GPI_APIC(pad, pull, rst) \
- _PAD_CFG_STRUCT(pad, \
- PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
- PAD_IRQ_CFG(IOAPIC, LEVEL, NONE), PAD_PULL(pull))
-
-#define PAD_CFG_GPI_APIC_INVERT(pad, pull, rst) \
- _PAD_CFG_STRUCT(pad, \
- PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
- PAD_IRQ_CFG(IOAPIC, LEVEL, INVERT), PAD_PULL(pull))
-
-#define PAD_CFG_GPI_ACPI_SCI(pad, pull, rst, inv) \
- PAD_CFG_GPI_SCI(pad, pull, rst, EDGE_SINGLE, inv)
-
-#define PAD_CFG_GPI_ACPI_SMI(pad, pull, rst, inv) \
- PAD_CFG_GPI_SMI(pad, pull, rst, EDGE_SINGLE, inv)
-
-#define PAD_CFG_NC(pad) PAD_NC(pad, NONE)
-
-#define PAD_CFG1_PULL_20K_PU PAD_CFG1_PULL_UP_20K
-#define PAD_CFG1_PULL_5K_PU PAD_CFG1_PULL_UP_5K
-#define PAD_CFG1_PULL_20K_PD PAD_CFG1_PULL_DN_20K
-#define PAD_CFG0_TRIG_EDGE PAD_CFG0_TRIG_EDGE_SINGLE
-#define PAD_CFG0_RX_POL_YES PAD_CFG0_RX_POL_INVERT
-
-#else
/* General purpose input, routed to APIC */
#define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
PAD_IRQ_CFG(IOAPIC, trig, inv), PAD_PULL(pull) | \
PAD_IOSSTATE(TxDRxE))
-#endif
/* General purpose input, routed to APIC - with IOStandby Config*/
#define PAD_CFG_GPI_APIC_IOS(pad, pull, rst, trig, inv, iosstate, iosterm) \
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 55e74cd360..2478113c35 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -51,7 +51,6 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_CPU
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
- select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
select SOC_INTEL_COMMON_BLOCK_GSPI
select SOC_INTEL_COMMON_BLOCK_HDA
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index e449409c4f..a83a3c3572 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -47,7 +47,6 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_FAST_SPI
select SOC_INTEL_COMMON_BLOCK_GPIO
select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
- select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
select SOC_INTEL_COMMON_BLOCK_PCR
select TSC_MONOTONIC_TIMER