summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
authornick_xr_chen <nick_xr_chen@wistron.corp-partner.google.com>2020-06-30 09:34:33 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-07-06 20:32:11 +0000
commitf446b81f8fc9247d393edb2447f0afbd2829a637 (patch)
tree1642687166be62ae87ec9b1430bb8592c0840b03 /src/soc/intel
parentd9dea6561585d0d69f2df277a81616137230a7ba (diff)
mb/google/volteer: Enable HotPlug on PCIe root port for the SD express
Enable HotPlug for the PCIe root port that the SD express is on so the OS can re-train the link without needing a reboot if it goes down unexpectedly at runtime. BUG=b:156879564 BRANCH=master TEST=enable HotPlug on Volteer Root Port 7 (SD express) and check in linux that it is identified as a HotPlug capable root port Signed-off-by: Nick Chen <nick_xr_chen@wistron.corp-partner.google.com> Change-Id: Ie9d427dd297567f06123119a670b5ed2e1f73701 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42897 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions