diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-01-28 13:12:58 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-02-02 07:35:02 +0000 |
| commit | ea47c6b580c039ea7f59a42e16d66c9987144444 (patch) | |
| tree | f96d6a0b5f5568285b939fdafa9f2ab8dfa486c3 /src/soc/intel | |
| parent | be3e911d53b1df8ba650eba5ddbd057119156684 (diff) | |
soc/intel/apollolake: Use PCR write to disable HECI1
Set the SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR config for
Apollo Lake to disable HECI1 device using PCR writes.
BUG=none
TEST=None
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I8df9544296f0bea095c5415805a596cb5b36885e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61444
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/cse.c | 4 |
2 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index d3f7332047..cd0abf7122 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -73,6 +73,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG select SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY select SOC_INTEL_COMMON_BLOCK_GRAPHICS + select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR if DISABLE_HECI1_AT_PRE_BOOT select SOC_INTEL_COMMON_BLOCK_ITSS select SOC_INTEL_COMMON_BLOCK_I2C select SOC_INTEL_COMMON_BLOCK_LPC diff --git a/src/soc/intel/apollolake/cse.c b/src/soc/intel/apollolake/cse.c index 29d0a5e3d8..7d1e6e7b75 100644 --- a/src/soc/intel/apollolake/cse.c +++ b/src/soc/intel/apollolake/cse.c @@ -192,7 +192,7 @@ static void dump_cse_state(void) #define PCR_PSFX_T0_SHDW_PCIEN 0x1C #define PCR_PSFX_T0_SHDW_PCIEN_FUNDIS (1 << 8) -static void disable_heci1(void) +void soc_disable_heci1_using_pcr(void) { pcr_or32(PID_PSF3, PSF3_BASE_ADDRESS + PCR_PSFX_T0_SHDW_PCIEN, PCR_PSFX_T0_SHDW_PCIEN_FUNDIS); @@ -207,7 +207,7 @@ void heci_cse_lockdown(void) * anymore. */ if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT)) - disable_heci1(); + heci1_disable(); } BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, fpf_blown, NULL); |