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authorJulius Werner <jwerner@chromium.org>2022-01-21 17:06:20 -0800
committerJulius Werner <jwerner@chromium.org>2022-02-07 23:29:09 +0000
commite9665959edeba6ae2d5364c4f7339704b6b6fd42 (patch)
treee3cd9e0e6e91c9b6bd5c6f586a9abee1d654b5dd /src/soc/intel
parent266041f0e62296737617cc2fcfa97f31e2b43aea (diff)
treewide: Remove "ERROR: "/"WARN: " prefixes from log messages
Now that the console system itself will clearly differentiate loglevels, it is no longer necessary to explicitly add "ERROR: " in front of every BIOS_ERR message to help it stand out more (and allow automated tooling to grep for it). Removing all these extra .rodata characters should save us a nice little amount of binary size. This patch was created by running find src/ -type f -exec perl -0777 -pi -e 's/printk\(\s*BIOS_ERR,\s*"ERROR: /printk\(BIOS_ERR, "/gi' '{}' ';' and doing some cursory review/cleanup on the result. Then doing the same thing for BIOS_WARN with 's/printk\(\s*BIOS_WARNING,\s*"WARN(ING)?: /printk\(BIOS_WARNING, "/gi' Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I3d0573acb23d2df53db6813cb1a5fc31b5357db8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61309 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Lance Zhao Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/alderlake/chip.c2
-rw-r--r--src/soc/intel/alderlake/romstage/fsp_params.c6
-rw-r--r--src/soc/intel/alderlake/systemagent.c2
-rw-r--r--src/soc/intel/alderlake/vr_config.c2
-rw-r--r--src/soc/intel/braswell/southcluster.c5
-rw-r--r--src/soc/intel/broadwell/pch/me_status.c2
-rw-r--r--src/soc/intel/cannonlake/chip.c2
-rw-r--r--src/soc/intel/cannonlake/vr_config.c2
-rw-r--r--src/soc/intel/common/block/acpi/acpi_bert.c12
-rw-r--r--src/soc/intel/common/block/cse/cse.c2
-rw-r--r--src/soc/intel/common/block/cse/cse_eop.c2
-rw-r--r--src/soc/intel/common/block/fast_spi/fast_spi_flash.c6
-rw-r--r--src/soc/intel/common/block/irq/irq.c10
-rw-r--r--src/soc/intel/common/block/pcie/pcie_helpers.c2
-rw-r--r--src/soc/intel/common/block/pmc/pmclib.c2
-rw-r--r--src/soc/intel/common/block/thermal/thermal_pci.c4
-rw-r--r--src/soc/intel/quark/storage_test.c3
-rw-r--r--src/soc/intel/skylake/vr_config.c4
-rw-r--r--src/soc/intel/tigerlake/chip.c2
19 files changed, 35 insertions, 37 deletions
diff --git a/src/soc/intel/alderlake/chip.c b/src/soc/intel/alderlake/chip.c
index 9127c5e302..3f5c36597a 100644
--- a/src/soc/intel/alderlake/chip.c
+++ b/src/soc/intel/alderlake/chip.c
@@ -150,7 +150,7 @@ void soc_init_pre_device(void *chip_info)
static void cpu_fill_ssdt(const struct device *dev)
{
if (!generate_pin_irq_map())
- printk(BIOS_ERR, "ERROR: Failed to generate ACPI _PRT table!\n");
+ printk(BIOS_ERR, "Failed to generate ACPI _PRT table!\n");
generate_cpu_entries(dev);
}
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index 790aa99bb9..9a42642265 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -284,17 +284,17 @@ static void fill_fspm_vtd_params(FSP_M_CONFIG *m_cfg,
if (m_cfg->VtdIgdEnable && m_cfg->VtdBaseAddress[VTD_GFX] == 0) {
m_cfg->VtdIgdEnable = 0;
- printk(BIOS_ERR, "ERROR: Requested IGD VT-d, but GFXVT_BASE_ADDRESS is 0\n");
+ printk(BIOS_ERR, "Requested IGD VT-d, but GFXVT_BASE_ADDRESS is 0\n");
}
if (m_cfg->VtdIpuEnable && m_cfg->VtdBaseAddress[VTD_IPU] == 0) {
m_cfg->VtdIpuEnable = 0;
- printk(BIOS_ERR, "ERROR: Requested IPU VT-d, but IPUVT_BASE_ADDRESS is 0\n");
+ printk(BIOS_ERR, "Requested IPU VT-d, but IPUVT_BASE_ADDRESS is 0\n");
}
if (!m_cfg->VtdDisable && m_cfg->VtdBaseAddress[VTD_VTVCO] == 0) {
m_cfg->VtdDisable = 1;
- printk(BIOS_ERR, "ERROR: Requested VT-d, but VTVCO_BASE_ADDRESS is 0\n");
+ printk(BIOS_ERR, "Requested VT-d, but VTVCO_BASE_ADDRESS is 0\n");
}
if (m_cfg->TcssDma0En || m_cfg->TcssDma1En)
diff --git a/src/soc/intel/alderlake/systemagent.c b/src/soc/intel/alderlake/systemagent.c
index 1736e32e71..1bbd62af70 100644
--- a/src/soc/intel/alderlake/systemagent.c
+++ b/src/soc/intel/alderlake/systemagent.c
@@ -87,7 +87,7 @@ void soc_systemagent_init(struct device *dev)
}
if (i == ARRAY_SIZE(cpuid_to_adl)) {
- printk(BIOS_ERR, "ERROR: unknown SA ID: 0x%4x, skipped power limits configuration.\n",
+ printk(BIOS_ERR, "unknown SA ID: 0x%4x, skipped power limits configuration.\n",
sa_pci_id);
return;
}
diff --git a/src/soc/intel/alderlake/vr_config.c b/src/soc/intel/alderlake/vr_config.c
index 44e4528eb3..c0058cdba6 100644
--- a/src/soc/intel/alderlake/vr_config.c
+++ b/src/soc/intel/alderlake/vr_config.c
@@ -53,7 +53,7 @@ static uint32_t load_table(const struct vr_lookup *tbl, const int tbl_entries, c
return tbl[i].conf[domain];
}
- printk(BIOS_ERR, "ERROR: Unknown MCH (0x%x) in %s\n", mch_id, __func__);
+ printk(BIOS_ERR, "Unknown MCH (0x%x) in %s\n", mch_id, __func__);
return 0;
}
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 25868640a4..4c6cbee343 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -106,7 +106,7 @@ static void write_pci_config_irqs(void)
const struct soc_irq_route *ir = &global_soc_irq_route;
if (ir == NULL) {
- printk(BIOS_WARNING, "Warning: Can't write PCI IRQ assignments "
+ printk(BIOS_WARNING, "Can't write PCI IRQ assignments "
"because 'global_braswell_irq_route' structure does not exist\n");
return;
}
@@ -142,8 +142,7 @@ static void write_pci_config_irqs(void)
device_num = PCI_SLOT(parent_bdf);
if (ir->pcidev[device_num] == 0) {
- printk(BIOS_WARNING,
- "Warning: PCI Device %d does not have an IRQ entry, "
+ printk(BIOS_WARNING, "PCI Device %d does not have an IRQ entry, "
"skipping it\n", device_num);
continue;
}
diff --git a/src/soc/intel/broadwell/pch/me_status.c b/src/soc/intel/broadwell/pch/me_status.c
index fa44c7c79d..ef6a0f3473 100644
--- a/src/soc/intel/broadwell/pch/me_status.c
+++ b/src/soc/intel/broadwell/pch/me_status.c
@@ -307,7 +307,7 @@ void intel_me_hsio_version(uint16_t *version, uint16_t *checksum)
udelay(ME_DELAY);
}
if (!count) {
- printk(BIOS_ERR, "ERROR: ME failed to respond\n");
+ printk(BIOS_ERR, "ME failed to respond\n");
return;
}
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index 80a6c01ce8..27c49b174d 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -162,7 +162,7 @@ static void cpu_fill_ssdt(const struct device *dev)
generate_cpu_entries(dev);
if (!generate_pin_irq_map())
- printk(BIOS_ERR, "ERROR: Failed to generate ACPI _PRT table!\n");
+ printk(BIOS_ERR, "Failed to generate ACPI _PRT table!\n");
}
static void cpu_set_north_irqs(struct device *dev)
diff --git a/src/soc/intel/cannonlake/vr_config.c b/src/soc/intel/cannonlake/vr_config.c
index 7ba73eac3f..ade1ef6277 100644
--- a/src/soc/intel/cannonlake/vr_config.c
+++ b/src/soc/intel/cannonlake/vr_config.c
@@ -107,7 +107,7 @@ static uint16_t load_table(const struct vr_lookup *tbl,
break;
}
- printk(BIOS_ERR, "ERROR: Unknown MCH (0x%x) in %s\n", mch_id, __func__);
+ printk(BIOS_ERR, "Unknown MCH (0x%x) in %s\n", mch_id, __func__);
return 0;
}
diff --git a/src/soc/intel/common/block/acpi/acpi_bert.c b/src/soc/intel/common/block/acpi/acpi_bert.c
index 85fbc03f6e..beb131ee1b 100644
--- a/src/soc/intel/common/block/acpi/acpi_bert.c
+++ b/src/soc/intel/common/block/acpi/acpi_bert.c
@@ -39,7 +39,7 @@ enum cb_err acpi_soc_get_bert_region(void **region, size_t *length)
}
if (!cl_get_total_data_size()) {
- printk(BIOS_ERR, "Error: No crashlog record present\n");
+ printk(BIOS_ERR, "No crashlog record present\n");
return CB_ERR;
}
@@ -47,12 +47,12 @@ enum cb_err acpi_soc_get_bert_region(void **region, size_t *length)
gesb_header_size = sizeof(*status);
if (!status) {
- printk(BIOS_ERR, "Error: unable to allocate GSB\n");
+ printk(BIOS_ERR, "unable to allocate GSB\n");
return CB_ERR;
}
if (cl_get_total_data_size() > bert_storage_remaining()) {
- printk(BIOS_ERR, "Error: Crashlog entry would exceed "
+ printk(BIOS_ERR, "Crashlog entry would exceed "
"available region\n");
return CB_ERR;
}
@@ -61,7 +61,7 @@ enum cb_err acpi_soc_get_bert_region(void **region, size_t *length)
if (cpu_record_size) {
cl_data = new_cper_fw_error_crashlog(status, cpu_record_size);
if (!cl_data) {
- printk(BIOS_ERR, "Error: Crashlog CPU entry(size %lu) "
+ printk(BIOS_ERR, "Crashlog CPU entry(size %lu) "
"would exceed available region\n",
cpu_record_size);
return CB_ERR;
@@ -75,14 +75,14 @@ enum cb_err acpi_soc_get_bert_region(void **region, size_t *length)
if (pmc_record_size) {
/* Allocate new FW ERR structure in case CPU crashlog is present */
if (cpu_record_size && !bert_append_fw_err(status)) {
- printk(BIOS_ERR, "Error: Crashlog PMC entry would "
+ printk(BIOS_ERR, "Crashlog PMC entry would "
"exceed available region\n");
return CB_ERR;
}
cl_data = new_cper_fw_error_crashlog(status, pmc_record_size);
if (!cl_data) {
- printk(BIOS_ERR, "Error: Crashlog PMC entry(size %lu) "
+ printk(BIOS_ERR, "Crashlog PMC entry(size %lu) "
"would exceed available region\n",
pmc_record_size);
return CB_ERR;
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 6dfe329fc4..a9a619c24e 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -1051,7 +1051,7 @@ static void me_reset_with_count(void)
* If the (CS)ME fails to change states after 3 attempts, it will
* likely need a cold boot, or recovering.
*/
- printk(BIOS_ERR, "Error: Failed to change ME state in %u attempts!\n",
+ printk(BIOS_ERR, "Failed to change ME state in %u attempts!\n",
ME_DISABLE_ATTEMPTS);
}
diff --git a/src/soc/intel/common/block/cse/cse_eop.c b/src/soc/intel/common/block/cse/cse_eop.c
index 3fc4e2b270..5d6a4a7886 100644
--- a/src/soc/intel/common/block/cse/cse_eop.c
+++ b/src/soc/intel/common/block/cse/cse_eop.c
@@ -172,7 +172,7 @@ static void handle_cse_eop_result(enum cse_eop_result result)
break;
case CSE_EOP_RESULT_ERROR: /* fallthrough */
default:
- printk(BIOS_ERR, "ERROR: Failed to send EOP to CSE, %d\n", result);
+ printk(BIOS_ERR, "Failed to send EOP to CSE, %d\n", result);
/* For vboot, trigger recovery mode if applicable, as there is
likely something very broken in this case. */
if (CONFIG(VBOOT) && !vboot_recovery_mode_enabled())
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c
index 1b0652d5ad..aead8debc9 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c
@@ -350,7 +350,7 @@ static int fast_spi_flash_protect(const struct spi_flash *flash,
}
if (fpr >= SPIBAR_FPR_MAX) {
- printk(BIOS_ERR, "ERROR: No SPI FPR free!\n");
+ printk(BIOS_ERR, "No SPI FPR free!\n");
return -1;
}
@@ -365,7 +365,7 @@ static int fast_spi_flash_protect(const struct spi_flash *flash,
protect_mask |= (SPI_FPR_RPE | SPI_FPR_WPE);
break;
default:
- printk(BIOS_ERR, "ERROR: Seeking invalid protection!\n");
+ printk(BIOS_ERR, "Seeking invalid protection!\n");
return -1;
}
@@ -376,7 +376,7 @@ static int fast_spi_flash_protect(const struct spi_flash *flash,
write32((void *)fpr_base, reg);
reg = read32((void *)fpr_base);
if (!(reg & protect_mask)) {
- printk(BIOS_ERR, "ERROR: Unable to set SPI FPR %d\n", fpr);
+ printk(BIOS_ERR, "Unable to set SPI FPR %d\n", fpr);
return -1;
}
diff --git a/src/soc/intel/common/block/irq/irq.c b/src/soc/intel/common/block/irq/irq.c
index 007445116a..8b0642f149 100644
--- a/src/soc/intel/common/block/irq/irq.c
+++ b/src/soc/intel/common/block/irq/irq.c
@@ -128,7 +128,7 @@ static int pirq_to_irq(enum pirq pirq)
static bool assign_pirq(struct pin_info pin_info[PCI_INT_MAX], enum pci_pin pin, enum pirq pirq)
{
if (pirq < PIRQ_A || pirq > PIRQ_H) {
- printk(BIOS_ERR, "ERROR: Invalid pirq constraint %u\n", pirq);
+ printk(BIOS_ERR, "Invalid pirq constraint %u\n", pirq);
return false;
}
@@ -143,7 +143,7 @@ static bool assign_pin(enum pci_pin pin, unsigned int fn, enum pin_state state,
enum pci_pin fn_pin_map[MAX_FNS])
{
if (pin < PCI_INT_A || pin > PCI_INT_D) {
- printk(BIOS_ERR, "ERROR: Invalid pin constraint %u\n", pin);
+ printk(BIOS_ERR, "Invalid pin constraint %u\n", pin);
return false;
}
@@ -182,7 +182,7 @@ static bool assign_fixed_pirqs(const struct slot_irq_constraints *constraints,
fixed pin */
const enum pci_pin pin = fn_pin_map[i];
if (pin == PCI_INT_NONE) {
- printk(BIOS_ERR, "ERROR: Slot %u, pirq %u, no pin for function %zu\n",
+ printk(BIOS_ERR, "Slot %u, pirq %u, no pin for function %zu\n",
constraints->slot, fixed_pirq, i);
return false;
}
@@ -210,7 +210,7 @@ static bool assign_direct_irqs(const struct slot_irq_constraints *constraints,
const int irq = find_free_unique_irq();
if (irq == INVALID_IRQ) {
- printk(BIOS_ERR, "ERROR: No free unique IRQs found\n");
+ printk(BIOS_ERR, "No free unique IRQs found\n");
return false;
}
@@ -234,7 +234,7 @@ static bool assign_shareable_pins(const struct slot_irq_constraints *constraints
pin = find_shareable_pin(pin_info);
if (pin == PCI_INT_NONE) {
- printk(BIOS_ERR, "ERROR: No shareable pins found\n");
+ printk(BIOS_ERR, "No shareable pins found\n");
return false;
}
}
diff --git a/src/soc/intel/common/block/pcie/pcie_helpers.c b/src/soc/intel/common/block/pcie/pcie_helpers.c
index e8ed3be56d..00bef42a79 100644
--- a/src/soc/intel/common/block/pcie/pcie_helpers.c
+++ b/src/soc/intel/common/block/pcie/pcie_helpers.c
@@ -29,7 +29,7 @@ uint32_t pcie_rp_enable_mask(const struct pcie_rp_group *const groups)
for (group = groups; group->count; ++group) {
if (group->count + offset >= sizeof(mask) * 8) {
- printk(BIOS_ERR, "ERROR: %s: Root port count greater than mask size!\n",
+ printk(BIOS_ERR, "%s: Root port count greater than mask size!\n",
__func__);
break;
}
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index f7efeb78da..da78d5c424 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -611,7 +611,7 @@ void pmc_set_power_failure_state(const bool target_on)
pmc_soc_set_afterg3_en(target_on);
break;
default:
- printk(BIOS_WARNING, "WARNING: Unknown power-failure state: %d\n", state);
+ printk(BIOS_WARNING, "Unknown power-failure state: %d\n", state);
break;
}
}
diff --git a/src/soc/intel/common/block/thermal/thermal_pci.c b/src/soc/intel/common/block/thermal/thermal_pci.c
index 1b9f28a176..04203fe136 100644
--- a/src/soc/intel/common/block/thermal/thermal_pci.c
+++ b/src/soc/intel/common/block/thermal/thermal_pci.c
@@ -19,13 +19,13 @@ void pch_thermal_configuration(void)
dev = pcidev_path_on_root(PCH_DEVFN_THERMAL);
if (!dev) {
- printk(BIOS_ERR, "ERROR: PCH_DEVFN_THERMAL device not found!\n");
+ printk(BIOS_ERR, "PCH_DEVFN_THERMAL device not found!\n");
return;
}
res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res) {
- printk(BIOS_ERR, "ERROR: PCH thermal device not found!\n");
+ printk(BIOS_ERR, "PCH thermal device not found!\n");
return;
}
diff --git a/src/soc/intel/quark/storage_test.c b/src/soc/intel/quark/storage_test.c
index 1eed84e9b2..e7e464601c 100644
--- a/src/soc/intel/quark/storage_test.c
+++ b/src/soc/intel/quark/storage_test.c
@@ -195,8 +195,7 @@ void storage_test(uint32_t bar, int full_initialization)
err = storage_setup_media(media, &sdhci_ctrlr->sd_mmc_ctrlr);
if (err) {
display_log();
- printk(BIOS_ERR,
- "ERROR: Device failed to initialize, err = %d\n",
+ printk(BIOS_ERR, "Device failed to initialize, err = %d\n",
err);
return;
}
diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c
index b807f54be3..89d85cffd7 100644
--- a/src/soc/intel/skylake/vr_config.c
+++ b/src/soc/intel/skylake/vr_config.c
@@ -222,7 +222,7 @@ static uint16_t get_sku_icc_max(int domain)
return icc_max[domain];
}
default:
- printk(BIOS_ERR, "ERROR: Unknown MCH (0x%x) in %s\n", mch_id, __func__);
+ printk(BIOS_ERR, "Unknown MCH (0x%x) in %s\n", mch_id, __func__);
}
return 0;
}
@@ -292,7 +292,7 @@ static uint16_t get_sku_ac_dc_loadline(const int domain)
return loadline[domain];
}
default:
- printk(BIOS_ERR, "ERROR: Unknown MCH (0x%x) in %s\n", mch_id, __func__);
+ printk(BIOS_ERR, "Unknown MCH (0x%x) in %s\n", mch_id, __func__);
}
return 0;
}
diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c
index 459452455c..9343ecfbba 100644
--- a/src/soc/intel/tigerlake/chip.c
+++ b/src/soc/intel/tigerlake/chip.c
@@ -164,7 +164,7 @@ void soc_init_pre_device(void *chip_info)
static void cpu_fill_ssdt(const struct device *dev)
{
if (!generate_pin_irq_map())
- printk(BIOS_ERR, "ERROR: Failed to generate ACPI _PRT table!\n");
+ printk(BIOS_ERR, "Failed to generate ACPI _PRT table!\n");
generate_cpu_entries(dev);
}