summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2021-11-15 23:24:08 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-11-17 08:47:21 +0000
commite2cc773f71891f26330f235421602ad4bd3695e6 (patch)
treecb47d305e7a7acaf159bf7a09b9be4c02ed02893 /src/soc/intel
parentdb85b096d454576e2d75ea5976b86c4460517d0e (diff)
soc/intel/../thermal: Fix return type of `pch_get_ltt_value()`
This patch modifies the pch_get_ltt_value() function return type from uint16_t to uint32_t to accommodate platforms with more than one thermal threshold. For example: Alder Lake PCH Trip Point = T2L | T1L | T0L where T2L > T1L > T0L. BUG=b:193774296 Change-Id: I5f46ccb457b9cfebf13a512eabb3fb0fab8adb39 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59311 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/common/block/thermal/thermal.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/thermal/thermal.c b/src/soc/intel/common/block/thermal/thermal.c
index 6211f35bd1..11a6108904 100644
--- a/src/soc/intel/common/block/thermal/thermal.c
+++ b/src/soc/intel/common/block/thermal/thermal.c
@@ -23,7 +23,7 @@ static uint8_t get_thermal_trip_temp(void)
}
/* PCH Low Temp Threshold (LTT) */
-static uint16_t pch_get_ltt_value(struct device *dev)
+static uint32_t pch_get_ltt_value(struct device *dev)
{
uint8_t thermal_config;