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author | Arthur Heymans <arthur@aheymans.xyz> | 2022-12-08 14:51:11 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-12 13:51:46 +0000 |
commit | e0f08727e1aacf861156c6e5a3aebdc105696680 (patch) | |
tree | 9417370250ec2102918e548dd423b3df061a1f7e /src/soc/intel | |
parent | f339b63b02193c5f562882170655199fc31a41da (diff) |
mb/ocp: Provide better defaults for UART
The baudrate of the SOC console is always 57600 and on tiogapass the
0x2f8 COM port is also used by the SOL console.
Change-Id: Ia7bf9fbe10ec66f49c2c7b41938a1a33967c131a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70500
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions