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authorArthur Heymans <arthur@aheymans.xyz>2022-03-24 01:16:01 +0100
committerArthur Heymans <arthur@aheymans.xyz>2022-05-11 06:04:10 +0000
commitcc70646255414f8e3f6df03cede54f6f9a651db2 (patch)
tree95061e5937b67f9fce4e9a6cc594553f567808c8 /src/soc/intel
parent35c492b629d5589152784d2cc5b1e088010cff83 (diff)
*.h: Fix up typos in guarding
Clang complains about this. Change-Id: I421d6c5daa373d1537e4ac2243438e7f1f6208d1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63067 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/xeon_sp/include/soc/itss.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/itss.h b/src/soc/intel/xeon_sp/include/soc/itss.h
index 770a7dde5e..3be9b8bcf1 100644
--- a/src/soc/intel/xeon_sp/include/soc/itss.h
+++ b/src/soc/intel/xeon_sp/include/soc/itss.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef SOC_INTEL_XEON_SP_ITSS_H
-#define SOC_INTEL_XEONS_P_ITSS_H
+#define SOC_INTEL_XEON_SP_ITSS_H
#define ITSS_MAX_IRQ 119
#define IRQS_PER_IPC 32