diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2023-04-25 15:48:46 +0200 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-04-26 15:41:03 +0000 |
| commit | cbc5d3f34b87db779829eabc90c32780a3865a56 (patch) | |
| tree | c91d7e0d243d3989cbc13825bc833fee6a3b4905 /src/soc/intel | |
| parent | 1dc55aa35ecd814a0080653d3fc3199584724057 (diff) | |
soc/intel: Don't report _S1 state when unsupported
Since skylake Intel hardware does not support this sleep state. Trying
to enter S1 by having the OS enter sleep results in a system hang on at
least Alder lake (prodrive/atlas).
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC is a good proxy whether devices
support 'skylake style' PMC PCI device for ACPI registers.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ic9e19410696240755e8714db53a0525284f3a2da
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74760
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/pmc/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig index effdc12585..181ad81262 100644 --- a/src/soc/intel/common/block/pmc/Kconfig +++ b/src/soc/intel/common/block/pmc/Kconfig @@ -4,6 +4,7 @@ config SOC_INTEL_COMMON_BLOCK_PMC bool select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE + select ACPI_S1_NOT_SUPPORTED help Intel Processor common code for Power Management controller(PMC) subsystem |