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authorArthur Heymans <arthur@aheymans.xyz>2021-09-07 11:23:40 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-09-09 14:40:37 +0000
commitc2d0a494a3a60e14edb77bba3ee9736d49c4e531 (patch)
tree1bd3d734b4a19eab8eb9f0e8c70c4354ae840b15 /src/soc/intel
parentefebedd3fb73d0c35529cfb74e1982bc2a0e2e2a (diff)
intel/xeon_sp/cpx: Hook up public microcode release
Change-Id: I7e575cb17e2004bd931f4fa1d05f17c4cdca29ba Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57444 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Zhang <jonzhang@fb.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/xeon_sp/cpx/Kconfig1
-rw-r--r--src/soc/intel/xeon_sp/cpx/Makefile.inc2
2 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
index 51fc927fc0..4e3a7967fc 100644
--- a/src/soc/intel/xeon_sp/cpx/Kconfig
+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
@@ -4,7 +4,6 @@ if SOC_INTEL_COOPERLAKE_SP
config SOC_SPECIFIC_OPTIONS
def_bool y
- select MICROCODE_BLOB_NOT_HOOKED_UP
config FSP_HEADER_PATH
string "Location of FSP headers"
diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc
index 4d494b5466..ac8d837322 100644
--- a/src/soc/intel/xeon_sp/cpx/Makefile.inc
+++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc
@@ -17,4 +17,6 @@ ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx
+cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-0b
+
endif ## CONFIG_SOC_INTEL_COOPERLAKE_SP