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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-03-17 11:12:12 +0100 |
|---|---|---|
| committer | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-03-19 10:59:08 +0000 |
| commit | bb50190bec998b4ec1a6cf4e02f1ae4022b36084 (patch) | |
| tree | 1b03da5d0609a165aaea1f8fd4418f76d4b3c7ce /src/soc/intel | |
| parent | 43d260745a13dfefb2b03a6edbe9c109ab7ad2ee (diff) | |
soc/intel/xeon_sp: Drop RMRR entry for USB
Drop RMRR entry for XHCI controller since it's not under BIOS control.
There's no USB-PS/2 emulation done in SMM, hence it's not needed.
TEST=intel/archercity CRB
Change-Id: I5afd68371d71a00988fe0f8a6045ec5ce2adc6a1
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81297
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/xeon_sp/include/soc/acpi.h | 5 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/uncore_acpi.c | 27 |
2 files changed, 0 insertions, 32 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/acpi.h b/src/soc/intel/xeon_sp/include/soc/acpi.h index 882c22638e..e374544962 100644 --- a/src/soc/intel/xeon_sp/include/soc/acpi.h +++ b/src/soc/intel/xeon_sp/include/soc/acpi.h @@ -16,11 +16,6 @@ enum acpi_cstate_mode { CSTATES_C1C6 }; -#define MEM_BLK_COUNT 0x140 -typedef struct { - uint8_t buf[32]; -} MEM_BLK; - unsigned long northbridge_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp); unsigned long xeonsp_acpi_create_madt_lapics(unsigned long current); diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c index ef7233583d..86c3a667d2 100644 --- a/src/soc/intel/xeon_sp/uncore_acpi.c +++ b/src/soc/intel/xeon_sp/uncore_acpi.c @@ -439,33 +439,6 @@ static unsigned long acpi_create_atsr(unsigned long current) static unsigned long acpi_create_rmrr(unsigned long current) { - uint32_t size = ALIGN_UP(MEM_BLK_COUNT * sizeof(MEM_BLK), 0x1000); - - uint32_t *ptr; - - // reserve memory - ptr = cbmem_find(CBMEM_ID_STORAGE_DATA); - if (!ptr) { - ptr = cbmem_add(CBMEM_ID_STORAGE_DATA, size); - assert(ptr); - memset(ptr, 0, size); - } - - unsigned long tmp = current; - printk(BIOS_DEBUG, "[Reserved Memory Region] PCI Segment Number: 0x%x, Base Address: 0x%x, " - "End Address (limit): 0x%x\n", - 0, (uint32_t)ptr, (uint32_t)((uint32_t)ptr + size - 1)); - current += acpi_create_dmar_rmrr(current, 0, (uint32_t)ptr, - (uint32_t)((uint32_t)ptr + size - 1)); - - printk(BIOS_DEBUG, " [PCI Endpoint Device] PCI Bus Number: 0x%x, " - "PCI Path: 0x%x, 0x%x\n", - XHCI_BUS_NUMBER, PCH_DEV_SLOT_XHCI, XHCI_FUNC_NUM); - current += acpi_create_dmar_ds_pci(current, XHCI_BUS_NUMBER, - PCH_DEV_SLOT_XHCI, XHCI_FUNC_NUM); - - acpi_dmar_rmrr_fixup(tmp, current); - return current; } |