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authorSubrata Banik <subratabanik@google.com>2024-08-08 14:46:35 +0530
committerSubrata Banik <subratabanik@google.com>2024-08-09 09:24:30 +0000
commitab1d04a0c4d24073eb5bb324260f3fe78b992fea (patch)
tree29e40531f7a67e37124c162ed8e08d0b1048d36a /src/soc/intel
parentc84ff28ac534739bcc46d248639f32e6cc9c17c7 (diff)
mb/google/fatcat: Add support for soldered-down memory
This change adds support for soldered-down memory on the Fatcat board. It introduces a new Kconfig option `MEMORY_SOLDERDOWN` and includes the necessary Makefiles adjustments to handle SPD data in CBFS when this option is enabled. * A new Kconfig option `MEMORY_SOLDERDOWN` is added to control soldered-down memory support. * When `MEMORY_SOLDERDOWN` is enabled, it selects: * `CHROMEOS_DRAM_PART_NUMBER_IN_CBI` if `CHROMEOS` is enabled * `HAVE_SPD_IN_CBFS` * The Makefile is updated to include the `variants/$(VARIANT_DIR)/ memory` subdirectory and conditionally include the `spd` subdirectory based on `CONFIG_HAVE_SPD_IN_CBFS`. BUG=b:348678071 TEST=Able to build google/fatcat with N-1 silicon. Change-Id: I7edc1134630940812186118a29cbbd550f0e3634 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83828 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Ravishankar Sarawadi <ravishankar.sarawadi@intel.com> Reviewed-by: Pranava Y N <pranavayn@google.com>
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