diff options
| author | Anil Kumar <anil.kumar.k@intel.com> | 2023-05-01 11:44:47 -0700 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-10-04 05:51:19 +0000 |
| commit | a2d10bb029e7da6d18f50cc694b9da54deb462b2 (patch) | |
| tree | ef295b496e9403c6c8e297db37b456abd4720099 /src/soc/intel | |
| parent | 7b2edc3b6b5ecd37112d5e07f4601b68b2aea038 (diff) | |
soc/intel/cse: Check PSR bit before issuing PSR backup command
Get PSR bit state using MKHI_FWCAPS_GET_FW_FEATURE_STATE HECI command
Use this bit info to check if SKU supports PSR and consequently issue
PSR_HECI_FW_DOWNGRADE_BACKUP command for PSR data backup during
downgrade.
BUG=b:273207144
TEST=build CB image and boot on google/rex board. Check for
"PSR is supported in this SKU" message in coreboot logs to confirm
that PSR bit is set in SKU
Signed-off-by: Anil Kumar <anil.kumar.k@intel.com>
Change-Id: I6e92341a9dc799146eb8f1a70b3a4a16fd1aa0ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74874
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/cse/cse_lite.c | 32 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cse.h | 2 |
2 files changed, 33 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index d0b287368b..d968bff474 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -1065,6 +1065,28 @@ static bool is_psr_data_backed_up(void) return (get_psr_backup_status() == PSR_BACKUP_DONE); } +static bool is_psr_supported(void) +{ + uint32_t feature_status; + + /* + * Check if SoC has support for PSR feature typically PSR feature + * is only supported by vpro SKU + * + */ + if (cse_get_fw_feature_state(&feature_status) != CB_SUCCESS) { + printk(BIOS_ERR, "cse_get_fw_feature_state command failed !\n"); + return false; + } + + if (!(feature_status & ME_FW_FEATURE_PSR)) { + printk(BIOS_DEBUG, "PSR is not supported in this SKU !\n"); + return false; + } + + return true; +} + /* * PSR data needs to be backed up prior to downgrade. So switch the CSE boot mode to RW, send * PSR back-up command to CSE and update the PSR back-up state in CMOS. @@ -1077,6 +1099,16 @@ static void backup_psr_data(void) goto update_and_exit; /* + * The function to check for PSR feature support can only be called after + * switching to RW partition. The command MKHI_FWCAPS_GET_FW_FEATURE_STATE + * that gives feature state is supported by a process that is loaded only + * when CSE boots from RW. + * + */ + if (!is_psr_supported()) + goto update_and_exit; + + /* * Prerequisites: * 1) HFSTS1 Current Working State is Normal * 2) HFSTS1 Current Operation Mode is Normal diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index b177e1364f..f84dba86f1 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -40,7 +40,7 @@ enum mkhi_group_id { /* Get Firmware Feature State Command Id */ #define MKHI_FWCAPS_GET_FW_FEATURE_STATE 0x02 #define ME_FEATURE_STATE_RULE_ID 0x20 - +#define ME_FW_FEATURE_PSR BIT(5) /* MEI bus disable command. Must be sent to MEI client endpoint, not MKHI */ #define MEI_BUS_DISABLE_COMMAND 0xc |