diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-04-03 17:46:29 +0200 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-04-14 20:50:22 +0000 |
| commit | 9cd1bf2c17932e5985c5156dfa5fea76c25da725 (patch) | |
| tree | e9ddd41610d1d074ab07d370a87aac6bdae661d0 /src/soc/intel | |
| parent | e2271dc0de7e3ad299ade88d214e377a91ab0bc3 (diff) | |
soc/intel/xeon_sp/spr: Drop microcode constraints
For current generation SPR/EMR you need to add at least
3 different microcodes having about 2MiB of size in total.
This doesn't work with the hardcoded offset and size in Kconfig.
Since it's loaded through FIT there's no need to pass it to FSP-T.
Drop the hardcoded locations and place it somewhere in CBFS.
Test: Booted on ibm/sbp1 with microcode confirmed loaded in
bootblock on BSP. All the APs also have the correct
microcode version loaded.
TEST= Build and boot on intel/archercity CRB
'cat /proc/cpuinfo | grep microcode' result doesn't change
before and after this patch.
Change-Id: Iaa7007c2b11a860c9c664a7e753440bad7fe858e
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81635
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/Kconfig | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig index b40a53494b..7887bd01a6 100644 --- a/src/soc/intel/xeon_sp/spr/Kconfig +++ b/src/soc/intel/xeon_sp/spr/Kconfig @@ -75,13 +75,6 @@ config FSP_M_RC_HEAP_SIZE allocated at 0xfe800000 (the CAR base) and consumes about 0x150000 bytes of memory. -config CPU_MICROCODE_CBFS_LOC - hex - default 0xffe0fdc0 - -config CPU_MICROCODE_CBFS_LEN - hex - default 0x8c00 config STACK_SIZE hex |